ICS841N254BKI REVISION A NOVEMBER 6, 2013

2

©2013 Integrated Device Technology, Inc.

ICS841N254BI Data Sheet

Table 1. Pin Descriptions

NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.

Table 2. Pin Characteristics

Number

Name

Type

Description

1, 8, 13, 32

Power

Core supply pins.

2, 4

nc

Unused

No connect.

Power

Analog power supply.

5, 17,

23, 25, 31

GND

Power

Power supply ground.

6

REF_CLK

Input

Pulldown

Alternative single-ended reference clock input. LVCMOS/LVTTL interface levels.

7

nOEA

Input

Pulldown

Output enable input. See Table 3D for function. LVCMOS/LVTTL interface levels.

9

nOEB

Input

Pulldown

Output enable input. See Table 3E for function. LVCMOS/LVTTL interface levels.

10

REF_SEL

Input

Pulldown

Reference select input. See Table 3B for function.



LVCMOS/LVTTL interface levels.

11,

12

XTAL_IN,

XTAL_OUT

Input

Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.

14

BYPASS

Input

Pulldown

Bypass mode select pin. See Table 3C for function.



LVCMOS/LVTTL interface levels.

15,

16

F_SEL0,

F_SEL1

Input

Pulldown

Frequency select pin. See Table 3A for function. LVCMOS/LVTTL interface levels.

18, 19

QA1, nQA1

Output

Differential clock output. LVDS interface levels.

20

Power

Output supply pin for QAx outputs.

21, 22

QA0, nQA0

Output

Differential clock output. LVDS interface levels.

24

IREF

Input

External fixed precision resistor (475

) from this pin to ground provides a reference

current used for differential current-mode QBx, nQBx clock outputs.

26, 27

nQB1, QB1

Output

Differential clock output. HCSL interface levels.

28

Power

Output supply pin for QBx outputs.

29, 30

nQB0, QB0

Output

Differential clock output. HCSL interface levels.

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

Input Capacitance

4pF

100

k

