MAX3286CSLASHD datasheet(4/28 Pages) MAXIM

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3.0V to 5.5V, 1.25Gbps/2.5Gbps

LAN Laser Drivers

_______________________________________________________________________________________

Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)

POR DELAY vs. CPORDLY

CAPACITANCE (pF)

10,000

100,000

100

1000

100

1000

10,000

100,000

FLTDLY DURATION vs. CFLTDLY

CAPACITANCE (pF)

10,000

100

1000

100

1000

10,000

Note 1: Common-anode configuration refers to a configuration where POL = GND, POL = VCC, and an NPN device is used to set

the laser bias current. Common-cathode configuration refers to a configuration where POL = VCC, POL = GND, and a PNP

device is used to set the laser bias current.

Note 2: Deterministic jitter measured with a repeating K28.5 bit pattern 00111110101100000101. Deterministic jitter is the peak-to-

peak deviation from the ideal time crossings per ANSI X3.230, Annex A.

Note 3: For Fibre Channel and Gigabit Ethernet applications, the peak-to-peak random jitter is 14.1 times the RMS jitter.

Note 4: Delay from a fault on MD until FAULT is asserted high.

ELECTRICAL CHARACTERISTICS (continued)

(VCC = +3.0V to +5.5V, TA = 0°C to +70°C, unless otherwise noted. Typical values are at VCC = +3.3V, RTC = open and TA = +25°C;

see Figure 1a.)

MAX3286/MAX3296 only, Figure 1b,

CFLTDLY = open

CFLTDLY = 270pF

CFLTDLY = 0

MAX3286/MAX3296 only, Figure 1b

CONDITIONS

610

tEN_RESET

EN or EN Minimum Pulse Width

Required to Reset a Latched

Fault

100

140

µs

0.2

tFLTDLY

FLTDLY Duration

µs

3.5

5.5

tSHUTDN

SHDNDRV Asserted after EN =

Low or EN = High

µs

tRESET

FAULT Reset after EN, EN, or

POR Transition

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

EYE DIAGRAM

50ps/div

2.5Gbps, 1310nm LASER, 27 - 1 PRBS, IMOD = 15mA

MAX3286/MAX3296 only, Figure 1b,

CFLTDLY = 0.01µF

µs

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