LTC1594CS datasheet(17/24 Pages) LINER

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LTC1594/LTC1598

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Input Leakage Current

Input leakage currents can also create errors if the source

resistance gets too large. For instance, the maximum

input leakage specification of 200nA (at 85

°C) flowing

through a source resistance of 1.2k will cause a voltage

drop of 240

μV or 0.2LSB. This error will be much

reduced at lower temperatures because leakage drops

rapidly (see typical curve Input Channel Leakage Current

vs Temperature).

REFERENCE INPUTS

The reference input of the LTC1594/LTC1598 is effec-

tively a 50k resistor from the time CS goes low to the end

of the conversion. The reference input becomes a high

impedance node at any other time (see Figure 9). Since

the voltage on the reference input defines the voltage

span of the A/D converter, the reference input should be

driven by a reference with low ROUT (ex. LT1004, LT1019

and LT1021) or a voltage source with low ROUT.

Reduced Reference Operation

The effective resolution of the LTC1594/LTC1598 can be

increased by reducing the input span of the converters.

The LTC1594/LTC1598 exhibit good linearity and gain

over a wide range of reference voltages (see typical

curves Change in Linearity vs Reference Voltage and

Change in Gain vs Reference Voltage). However, care

must be taken when operating at low values of VREF

because of the reduced LSB step size and the resulting

higher accuracy requirement placed on the converters.

The following factors must be considered when operat-

ing at low VREF values:

1. Offset

2. Noise

3. Conversion speed (CLK frequency)

Offset with Reduced VREF

The offset of the LTC1594/LTC1598 has a larger effect on

the output code when the ADCs are operated with

reduced reference voltage. The offset (which is typically

a fixed voltage) becomes a larger fraction of an LSB as the

size of the LSB is reduced. The typical curve of Change in

Offset vs Reference Voltage shows how offset in LSBs is

related to reference voltage for a typical value of VOS. For

example, a VOS of 122μV which is 0.1LSB with a 5V

reference becomes 0.5LSB with a 1V reference and

2.5LSBs with a 0.2V reference. If this offset is unaccept-

able, it can be corrected digitally by the receiving system

or by offsetting the “COM” input of the LTC1594/LTC1598.

Noise with Reduced VREF

The total input referred noise of the LTC1594/LTC1598

can be reduced to approximately 400

μV peak-to-peak

using a ground plane, good bypassing, good layout

techniques and minimizing noise on the reference inputs.

This noise is insignificant with a 5V reference but will

become a larger fraction of an LSB as the size of the LSB

is reduced.

For operation with a 5V reference, the 400

μV noise is only

0.33LSB peak-to-peak. In this case, the LTC1594/LTC1598

noise will contribute virtually no uncertainty to the output

code. However, for reduced references the noise may

become a significant fraction of an LSB and cause

undesirable jitter in the output code. For example, with a

2.5V reference this same 400

μV noise is 0.66LSB peak-

to-peak. This will reduce the range of input voltages over

which a stable output code can be achieved by 1LSB. If

the reference is further reduced to 1V, the 400

μV noise

becomes equal to 1.65LSBs and a stable code may be

difficult to achieve. In this case averaging multiple read-

ings may be necessary.

This noise data was taken in a very clean setup. Any setup

induced noise (noise or ripple on VCC, VREF or VIN) will

add to the internal noise. The lower the reference voltage

to be used the more critical it becomes to have a clean,

noise free setup.

LTC1594

LTC1598

REF+

ROUT

VREF

GND

1594/98 F09

Figure 9. Reference Input Equivalent Circuit

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