LTC1516CS8 datasheet(6/8 Pages) LINER

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LTC1516

APPLICATIONS INFORMATION

Ultralow Quiescent Current (IQ < 5µA) Regulated

Supply

The LTC1516 contains an internal resistor divider (refer to

Block Diagram) which draws only 1.5

µA (typ) from VOUT.

During no-load conditions, the internal load causes a

droop rate of only 150mV per second on VOUT with

COUT = 10µF. Applying a 5Hz to 100Hz, 95% to 98% duty

cycle signal to the SHDN pin ensures that the circuit of

Figure 3 comes out of shutdown frequently enough to

maintain regulation during no-load or low-load condi-

tions. Since the part spends nearly all of its time in

shutdown, the no-load quiescent current (see Figure 4a) is

approximately equal to (VOUT)(1.5µA)/(VIN)(Efficiency).

The LTC1516 must be out of shutdown for a minimum

duration of 200

µstoallowenoughtimetosensetheoutput

and keep it in regulation. As the VOUT load current

increases, the frequency with which the part is taken out

of shutdown must also be increased to prevent VOUT

from drooping below 4.8V during the OFF phase (see

Figure 4b). A 100Hz 98% duty cycle signal on the SHDN

pin ensures proper regulation with load currents as high

as 100

µA. When load current greater than 100µA is

needed, the SHDN pin must be forced low as in normal

operation. The typical no-load supply current for this

circuit with VIN = 3V is only 3.2µA.

C1–

SHDN

GND

C2–

C1+

VIN

VOUT

C2+

LTC1516

0.22

µF

FROM MPU

µF

VOUT = 5V ±4%

SHDN PIN WAVEFORMS:

LOW IQ MODE (5Hz TO 100Hz, 95% TO 98% DUTY CYCLE)

IOUT ≤ 100µA

VOUT LOAD ENABLE MODE

(IOUT = 100µA TO 50mA)

0.22

µF

VIN = 2V TO 5V

1516 • F03

Figure 3. Ultralow Quiescent Current (<5

µA) Regulated Supply

Figure 4b. Maximum SHDN OFF Time vs Output Load Current for

Ultralow IQ Operation

Figure 4a. No Load ICC vs Input Voltage for Circuit in Figure 3

OUTPUT CURRENT (

µA)

100

1000

1516 • F04b

100

SHDN ON PULSE WIDTH = 200

µs

COUT = 10µF

INPUT VOLTAGE (V)

0.0

2.0

4.0

6.0

5.0

1516 • F04a

2.0

3.0

4.0

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