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LTC1435A

APPLICATIONS INFORMATION

The external resistive divider is connected to the output as

shown in Figure 5 allowing remote voltage sensing.

VOSENSE

LTC1435A

1435A F05

100pF

1.19V

≤ VOUT ≤ 9V

SGND

Figure 5. Setting the LTC1435A Output Voltage

Run/ Soft Start Function

The RUN/SS pin is a dual purpose pin that provides the soft

start function and a means to shut down the LTC1435A. Soft

start reduces surge currents from VIN by gradually increas-

ing the internal current limit.

Power supply sequencing can

also be accomplished using this pin.

An internal 3

µA current source charges up an external

capacitor CSS. When the voltage on RUN/SS reaches 1.3V

the LTC1435A begins operating. As the voltage on RUN/SS

continues to ramp from 1.3V to 2.4V, the internal current

limit is also ramped at a proportional linear rate. The cur-

rent limit begins at approximately 50mV/RSENSE (at VRUN/

SS = 1.3V) and ends at 150mV/RSENSE (VRUN/SS > 2.7V). The

output current thus ramps up slowly, charging the output

capacitor. If RUN/SS has been pulled all the way to ground

there is a delay before starting of approximately 500ms/

µF,

followed by an additional 500ms/

µF to reach full current.

tDELAY = 5(10 5)CSS Seconds

Pulling the RUN/SS pin below 1.3V puts the LTC1435A into

a low quiescent current shutdown (IQ < 25µA). This pin can

be driven directly from logic as shown in Figure 6. Diode

D1 in Figure 6 reduces the start delay but allows CSS toramp

up slowly for the soft start function; this diode and CSS can

be deleted if soft start is not needed. The RUN/SS pin has

an internal 6V Zener clamp (See Functional Diagram).

Foldback Current Limiting

As described in Power MOSFET and D1 Selection, the worst-

case dissipation for either MOSFET occurs with a short-

circuited output, when the synchronous MOSFET conducts

the current limit value almost continuously. In most appli-

cations this will not cause excessive heating, even for

extended fault intervals. However, when heat sinking is at

a premium or higher RDS(ON) MOSFETs are being used,

foldback current limiting should be added to reduce the

current in proportion to the severity of the fault.

Foldback current limiting is implemented by adding diode

DFB between the output and the ITH pin as shown in the

Functional Diagram. In a hard short (VOUT = 0V) the cur-

rent will be reduced to approximately 25% of the maximum

output current. This technique may be used for all applica-

tions with regulated output voltages of 1.8V or greater.

SFB Pin Operation

When the SFB pin drops below its ground referenced 1.19V

threshold, continuous mode operation is forced. In continu-

ous mode, the large N-channel main and synchronous

switches are used regardless of the load on the main output.

In addition to providing a logic input to force continuous

synchronous operation, the SFB pin provides a means to

regulate a flyback winding output. Continuous synchronous

operation allows power to be drawn from the auxiliary

windings without regard to the primary output load. The SFB

pin provides a way to force continuous synchronous op-

eration as needed by the flyback winding.

The secondary output voltage is set by the turns ratio of the

transformer in conjunction with a pair of external resistors

returned to the SFB pin as shown in Figure 4a. The second-

ary regulated voltage, VSEC, in Figure 4a is given by:

SEC

OUT

≈+

()









1 19 1

where N is the turns ratio of the transformer and VOUT is

the main output voltage sensed by VOSENSE.

Minimum On-Time Considerations

Minimum on-time, tON(MIN), is the smallest amount of time

that the LTC1435A is capable of turning the top MOSFET

1435 F06

CSS

3.3V OR 5V

RUN/SS

CSS

RUN/SS

Figure 6. RUN/SS Pin Interfacing

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