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LTC1279CSW датащи(PDF) 12 Page - Linear Technology |
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LTC1279CSW датащи(HTML) 12 Page - Linear Technology |
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12 / 16 page ![]() 12 LTC1279 S APPLICATI I FOR ATIO Unipolar Offset and Full-Scale Error Adjustments In applications where absolute accuracy is important, offset and full-scale errors can be adjusted to zero. Offset error must be adjusted before full-scale error. Figure 9a shows the extra components required for full-scale error adjustment. If both offset and full-scale adjustments are needed, the circuit in Figure 9b can be used. For zero offset error apply 0.61mV (i.e., 0.5LSB) at the input and adjust the offset trim until the LTC1279 output code flickers between 0000 0000 0000 and 0000 0000 0001. For zero full-scale error apply an analog input of 4.99817V (i.e., FS – 1.5LSB or last code transition) at the input and adjust R5 until the LTC1279 output code flickers between 1111 1111 1110 and 1111 1111 1111. 1279 F09a R4 100 Ω FULL-SCALE ADJUST R3 10k R2 10k R1 50 Ω V1 – + A1 ADDITIONAL PINS OMITTED FOR CLARITY ±20LSB TRIM RANGE LTC1279 AIN AGND Figure 9a. Full-Scale Adjust Circuit 1279 F09b R2 10k R4 100k R1 10k 10k 5V R9 20 Ω ANALOG INPUT 0V TO 5V R3 100k 5V R8 10k OFFSET ADJUST R6 400 Ω R5 4.3k FULL-SCALE ADJUST R7 100k – + LTC1279 AIN Figure 9b. LTC1279 Unipolar Offset and Full-Scale Adjust Circuit 1279 F09c R2 10k R4 100k R1 10k ANALOG INPUT R3 100k 5V R8 20k OFFSET ADJUST R6 200 Ω R5 4.3k FULL-SCALE ADJUST R7 100k – + –5V LTC1279 AIN Figure 9c. LTC1279 Bipolar Offset and Full-Scale Adjust Circuit Bipolar Offset and Full-Scale Error Adjustments Bipolar offset and full-scale errors are adjusted in a similar fashion to the unipolar case. Again, bipolar offset must be adjusted before full-scale error. Bipolar offset error ad- justment is achieved by trimming the offset of the op amp driving the analog input of the LTC1279 while the input voltage is 0.5LSB below ground. This is done by applying an input voltage of – 0.61mV (– 0.5LSB) to the input in Figure 9c and adjusting the R8 until the ADC output code flickers between 0000 0000 0000 and 1111 1111 1111. For full scale adjustment, an input voltage of 2.49817V (FS – 1.5LSBs) is applied to the input and R5 is adjusted until the output code flickers between 0111 1111 1110 and 0111 1111 1111. BOARD LAYOUT AND BYPASSING Wire wrap boards are not recommended for high resolu- tion or high speed A/D converters. To obtain the best performance from the LTC1279, a printed circuit board is required. The printed circuit board’s layout should ensure that digital and analog signal lines are separated as much as possible. In particular, care should be taken not to run any digital trace alongside an analog signal trace or underneath the ADC. The analog input should be screened by AGND. High quality tantalum and ceramic bypass capacitors should be used at the AVDD and VREF pins as shown in Figure 10. For the bipolar mode, a 0.1 µF ceramic provides |
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