6

LTC1096L/LTC1098L

TEST CIRCUITS

LTC1096/98 • TC06

CS

LTC1096L

1

CLK

B7

123

4

5

LTC1098L

CLK

START

B7

LTC1096/98 • TC07

CS

S

APPLICATI

I FOR ATIO

INPUT DATA WORD

configured to have a single differential input. The conver-

presented in MSB-first sequence followed by LSB se-

quence, provides easy interface to MSB- or LSB-first

serial ports.

edge of the clock. The input data words are defined as

follows:

Start Bit

goes low is the start bit. The start bit initiates the data

transfer. The LTC1098L will ignore all leading zeroes

which precede this logical one. After the start bit is

received, the remaining bits of the input word will be

until the next CS cycle.

Multiplexer (MUX) Address

The bits of the input word following the START bit assign

the MUX configuration for the requested conversion. For

a given channel selection, the converter will measure the

voltage between the two channels indicated by the “+” and

“–” signs in the selected row of the following tables. In

SGL/

DIFF

ODD/

SIGN

MSBF

START

MUX

ADDRESS

MSB-FIRST/

LSB-FIRST

LTC1096/9 • AI01