 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
LT1507CS8 датащи(PDF) 17 Page - Linear Technology |
|
|
|||||||||||||||||||||||||||||
LT1507CS8 датащи(HTML) 17 Page - Linear Technology |
|
|
17 / 20 page  17 LT1507 APPLICATIONS INFORMATION For VIN = 4.7, VOUT = 3.3V, f = 1MHz, L = 5µH and DCS = 25%: VmV P-P ≥ −− = − (. .)( . ) . 66 47 1 0 25 2 1 10 5 10 1 8 71 66 To avoid small values of RS, the compensation capacitor (CC) should be made as small as possible. 2000pF will work in most situations. If we increase VPP to 90mV for a little cushion, RS will be: Rk CpF S = () () = ≥ () () = − ()( . )( . ) . . 5 0 25 0 75 0 09 2 10 1 10 52 20 2 1 10 5200 612 96 6 π THERMAL CALCULATIONS Power dissipation in the LT1507 chip comes from four sources: switch DC loss, switch AC loss, boost circuit current and input quiescent current. The formulas below show how to calculate each of these losses. These formu- las assume continuous mode operation, so they should not be used for calculating efficiency at light load currents. Switch loss: P RI V V ns I V f SW SW OUT OUT IN OUT IN =+ () ( ) ()( )( ) 2 16 Boost current loss: P V V I BOOST OUT IN OUT =+ 2 0 008 75 . Quiescent current loss: PV V Q IN OUT =+ (. ) ( . ) 0 003 0 005 RSW = Switch resistance (≈ 0.4Ω) 16ns = Equivalent switch current/voltage overlap time f = Switching frequency works by prematurely tripping the oscillator before it reaches its normal peak value. For instance, if the oscilla- tor is synchronized at twice its nominal frequency, oscil- lator amplitude will drop by half. A ramp which previously started at the 40% point now starts at the 80% point! This effectively blocks slope compensation and the regulator may respond with fluctuating pulse widths, a “phase oscillation” if you will. The regulator output stays in regulation but subharmonic frequencies are generated at the switch node. The solution to this problem is to generate an external ramp that replaces the missing internal ramp. As it turns out, this is not difficult if the sync signal can be arranged to have a fairly low duty cycle (< 35%). The ramp is created by AC coupling a resistor from the sync signal to the compensation capacitor as shown in Figure 7. This gener- ates a negative ramp on the VC pin during switch ON time that emulates the missing internally generated ramp. Amplitude of the ramp should be about 100mV to 200mV peak-to-peak. The formulas for calculating the values of RS and CS are shown below. Note that the CS value is unimportant as long as it exceeds the value given. The formula assures that the impedance of CS will be small compared to RS. R VDC DC VC f C fR S SYNC S S C S S = − > ()( ) ()( ) ()( ) 1 20 2 P-P π VSYNC = Peak-to-peak value of sync signal DCS = Duty cycle of incoming sync signal VP-P = Desired amplitude of ramp f = Sync frequency Theoretical minimum amplitude for the ramp, assuming no internal ramp, is: V VV DC fL g OUT IN S mP P-P ≥ −− ()( ) ()( )( ) 21 2 gmP = Transconductance from VC pin to switch current (1.8A/V for the LT1507). |
|
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
