DocID027496 Rev 1

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AN4658

Peripheral migration guide

23

2.11

Audio interfaces

The STM32F429/439 and STM32F446 lines implement the same features on the SPI, apart

from I2S. This is clear from Table 14, where a gray cell indicates that the feature is not

available. The added bit in SPI_I2SCFGR register is shown in Table 15, where the new

feature is highlighted in red, and reserved bits are in light gray.

– I²S Full duplex

– SPI TI mode support

– SPI Motorola support

– 3 I²S Half duplex

– SPI TI mode support

– SPI Motorola support

– Enhanced clock source for I2S on

APB1 and APB2

Table 15. SPI_I2SCFGR register for STM32F446xx products

2.12

CRC

The STM32F446xx implements CRC (Cyclic redundancy check) unit calculation similarly to

STM32F429xx/439xx, the main features are listed in Table 16.

Table 14. Audio interfaces comparison

Audio

interfaces

Description

STM32F429xx/439xx

STM32F446xx

SPI/I2S

Instances

x6 | x2 (SPI/I2S)

x4 | x3 (SPI/I2S)

Features

Modifications

NA

allows to configure the I2S peripheral in

asynchronous start mode.

1. See Table 15

SAIs

Instances

x1 (SAI)

x2 (SAI)

Features

Clock source for each

SAI sub-block to target

independent audio

frequency sampling

Internal synchronization between the

two SAIs.

Clock source for each SAI block to target

independent audio frequency sampling.

SPDIFRx

Instances

NA

x1 (SPIDIFRx)

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

Res.

Res.

Res.

I2SE

I2SCFG

PCMSYNC

Res.

I2SSTD

CKPOL

DATLEN

CHLEN

Table 16. CRC features for STM32F429xx/439xx and STM32F446xx

CRC

STM32F429xx/439xx and STM32F446xx

Features

Single input/output 32-bit data register

CRC computation done in 4 AHB clock cycles (HCLK) for the 32-bit data size

General-purpose 8-bit register (can be used for temporary storage)

Uses CRC-32 (Ethernet) polynomial: 0x4C11DB7

Handles 32-bit data size