STM32F3xx microcontroller low-power overview

AN4538

10/25

DocID026505 Rev 1

1.4

STM32F3xx microcontroller power saving techniques

1.4.1

General techniques

This section gives a brief description of the main power-saving features that contribute a lot

reducing the current consumption and reaching an optimal trade-off between the

performance processing and the power efficiency.

•

System clock configuration

Several prescalers are used to configure the AHB frequency, the high-speed APB

(APB2) and the low-speed APB (APB1) domains. In Run mode, the speed of the

system clocks can be reduced by programming the registers prescalers to the highest

values in order to provide just the needed clocks to peripherals and avoid the over-

clocking that causes a consumption penalty.

The power consumption can be further lowered by gating clocks to the APBx and AHBx

peripherals when they are not in use.

•

I/O configuration

To avoid extra I/O currents, all unused pins should be configured as analog inputs, in

this mode the schmitt trigger input is disabled, providing zero consumption for each I/O

pin.

For the output, it is recommended to configure the I/O speed frequency at the lowest

possible speed. The user has to avoid the pull-up and pull-down activation if they are

not used and no-pull up/down configuration is recommended. The user has to also

disable the MCO pin of the clock output if not used.

•

Using direct memory access (DMA)

STM32F3xxxx device peripherals can be accessed through DMA. This feature is not

just useful to improve the performance, it can also be used to reduce the power

consumption. The CPU must be kept running to avoid overflow on peripherals featuring

only one buffer register. However, with DMA, the CPU can go to Sleep mode until the

completion of DMA transfer.

This allows the device to consume less average current over the life of the application.

•

Using low-power modes

Power mode switching in the application processing reduces the overall average

consumption by keeping the device as much as possible in low-power modes.

The best power management approach consists of switching between different power

modes, taking into account of the application requirements in terms of power

consumption, wakeup sources/time and the peripherals simultaneously.

•

Peripherals clock gating

The more peripheral blocks active simultaneously the highest the power consumption.

Substantial power saving can be achieved by gating the clocks of the peripherals that

are not in use.

•

Using peripheral low-power features

STM32F3xxxx devices have peripherals with particular power features that allow to

design and develop low-power applications while maintaining a high flexibility and an

easy interaction with the external world. For example, the devices can wake up from

low-power modes using USART, comparator, I2C and CEC.