DocID025810 Rev 3

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AN4434

Cycling endurance

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1.2.3

ECC and cycling budget

The Error Code Correction (ECC) is a specific logic, embedded in all CMOS F8H

automotive EEPROM devices, that is able to correct a single bit error when reading a byte.

ECCx1 Error Correction Code

The ECCx1 is implemented in the 1Kbit up to 16Kbit CMOS F8H automotive devices.

In EEPROMs with ECC x 1 logic, 4 bits of ECC are added on each data byte of the memory

array: if a single bit out of the data byte happens to be erroneous during a Read operation,

the ECC bits detect the wrong bit inside the data byte and restore the correct value. The

read reliability is therefore much improved.

The Error Correction Code (ECC x 1) is transparent for the user.

ECCx4 Error Correction Code

The ECCx4 is implemented in the CMOS F8H automotive devices when the memory size is

equal or larger than 32 Kbits.

In EEPROMs with ECCx4 logic, 6 bits of ECC are implemented for each group of four

bytes, making up a word (word = 4 bytes + 6 ECC bits). If a single bit out of the four data

bytes happens to be erroneous during a Read operation, the ECC bits detects the wrong bit

inside the data byte and restores the correct value. The read reliability is therefore much

improved.

The Error Correction Code (ECC x 4) is transparent for the user, however it is interesting to

consider the cycling budget:

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Byte(s) write

If one byte inside one group is written, the ECC function also writes/cycles the three

other bytes located in the same group. Therefore the cycling seen by a word is the sum

of the cycles seen by each byte inside the word and this sum must not exceed the

cycling performance specified in the datasheet.

Example 1: Cycling equally each byte inside a word.

Rule is: for a cycling limit of N cycles, each byte 0, byte 1, byte 2 and byte 3 of a word

can be equally cycled N/4 times so that the word cycling budget is:

N/4 + N/4 +N/4 + N/4 = N cycles.

Simple case: for 4 million cycles (at 25°C), each byte 0, byte 1, byte 2 and byte 3 inside

a word can be equally cycled 1 million times.

Example 2: Cycling unequally each byte inside a word.

Rule is: for a cycling of N cycles, and for bytes inside the same word, byte 0 can be

cycled A times, byte 1 can be cycled B times, byte 2 can be cycled C times and byte 3

can be cycled D times, so that the word cycling budget is A + B + C+ D = N cycles.

Simple case: for a 4 million cycles (at 25°C), and for bytes inside the same word, byte 0

can be cycled 2 million times, byte 1 can be cycled 1 million times, byte 2 and byte 3

can be cycled 1/2 million times (2 + 1 + ½ + ½ = 4).

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Word write

If the application writes data by word(s), the 4 bytes making up the word are always

updated at the same time and the number of write cycles is pulled to the highest cycling

possible value. The application designer has only to check that each word in the

EEPROM never exceeds the cycling performance specified in the datasheet (for