RM0312 datasheet(214/275 Pages) STMICROELECTRONICS

214 / 275 page

Serial peripheral interface (SPI)

RM0312

214/275

DocID022352 Rev 3

Figure 80. TXE/BSY behavior when transmitting (BDM = 0 and RXLONY = 0).

Case of discontinuous transfers

20.3.6

Status flags

There are three status flags to allow the application to completely monitor the state of the

SPI bus.

Tx buffer empty flag (TXE)

When set, this flag indicates that the Tx buffer is empty and that the next data to be

transmitted can be loaded into the buffer. The TXE flag is reset when writing the SPI_DR

Rx buffer not empty (RXNE)

When set, this flag indicates that there is a valid received data in the Rx buffer. This flag is

reset when SPI_DR is read.

Busy flag (BSY)

This BSY flag is set and reset by hardware (writing to this flag has no effect). The BSY flag

indicates the state of the communication layer of the SPI.

When BSY is set, it indicates that the SPI is busy communicating. There is one exception in

master mode / bidirectional receive mode (MSTR=1 and BDM=1 and BDOE=0) where the

BSY flag is kept low during the reception.

The BSY flag is useful to detect the end of a transfer if the software wants to disable the SPI

and enters Halt mode (or disable the peripheral clock). This will avoid corrupting the last

transfer. For this, the procedure described below must be strictly respected.

The BSY flag is also useful to avoid write collisions in a multimaster system.

The BSY flag is set when a transfer starts with the exception of master mode / bidirectional

receive mode (MSTR = 1 and BDM = 1 and BDOE = 0).

MOSI (out)

Tx buffer

DATA 1 = 0xF1

TXE flag

0xF1

BSY flag

0xF2

software writes 0xF1

into SPI_DR

software waits until TXE=1

but is late to write 0xF2 into

SPI_DR

software waits until TXE=1

but is late to writes 0xF3

into SPI_DR

SCK

DATA 2 = 0xF2

DATA 3 = 0xF3

Example with CPOL=1, CPHA = 1

0xF3

software waits

until TXE=1

software waits until

BSY=0

(write SPI_DR)

b0 b1 b2 b3 b4 b5 b6 b7

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