 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
AN3137 датащи(PDF) 33 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
AN3137 датащи(HTML) 33 Page - STMicroelectronics |
|
|
33 / 42 page  AN3137 Methods for precision improvement Doc ID 16983 Rev 3 33/42 4.4.4 Source of described problem - ADC design The following sections list some possible causes for the charging of the internal sampling capacitor Csh. This is not an exhaustive list; only the main possible sources of the ADC design are listed. Parasitic switch capacitance effect The sampling switch inside ADC sampling circuit (see Figure 14) is not ideal. In reality the sample and hold switch (S1) is designed as 2 transistors (PMOS and NMOS): Figure 18. Implementation of sampling switch The switch is controlled by the gate voltages of transistors (inverted signal on PMOS transistor). This design is a standard bidirectional switch (for rail to rail range of input Uin voltages). Both transistors have parasitic capacitances between gate and source. If those capacitances are charged (close to the switch), then their charge can be transferred to the sampling capacitor. |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
