AN2646 datasheet(11/43 Pages) STMICROELECTRONICS

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AN2646 - Application note

ISO 7816-3 – electronic signal and transmission protocol

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4.1

Card power-up and reset

When a card is inserted into a reader, no power is applied to any of the contacts. The chip

on the card could be seriously damaged by applying power to the wrong contacts, and this

situation could easily occur if a card were inserted across powered contact points. The

contacts remain unpowered until an edge detector determines that the card is properly

aligned with the contact points to within some acceptable (for the reader) mechanical

tolerance.

When the reader detects that the card is properly inserted, power is applied to the card.

First, the contacts are brought to a coherent idle state, as shown in Table 3. A reset signal is

then sent to the card via the RST contact line. The idle state occurs when the power (VCC)

contact is brought up to a normal, stable operating voltage of 5 V. An initial power setting of

5 V is always applied first, even though some microprocessor chips being introduced

operate at 3 V when in an I/O state. The I/O contact is set to a reception mode on the reader

side and a stable clock (CLK) is applied. The reset line is in a low state. It must remain in a

low state for at least 40 000 CLK cycles before a valid reset sequence can be started by the

reader, raising the reset line to a high state.

Figure 5.

Answer to reset

t3 = 40 000 clock cycles.

ATR must be issued by card between 400 clock cycles and 40 000 clock cycles after RST goes high.

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