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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AN2645 датащи(PDF) 33 Page - STMicroelectronics |
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AN2645 датащи(HTML) 33 Page - STMicroelectronics |
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33 / 36 page  AN2645 Block-by-block compatibility analysis 33/36 devices. So both the stack pointer initialization value and the stack length is product dependent. 3.7.6 GPIO and peripheral registers The space for the GPIO and peripheral registers is mapped in the memory area between addresses 0x5000 and 0x57FF. The register block start addresses for each peripheral are the same across in all sub-families. The names of the registers are the same but their position in the register structure differs slightly in some sub-families. That's why you can use the same drivers by referring to the register names, but you must be careful to include the correct library map file into your project and replace this file by the proper one if you are migrating to another family member. 3.7.7 Interrupt mapping The interrupt vector mapping is compatible for all the sub-families except STM8S103x and STM8S903x. These sub-families have an added vector for the external interrupt from the GPIO PF4 pin. The PF4 pin is present only in the 32-pin device. This vector is mapped in the same location as the CAN Rx interrupt which is not used in this sub-family. TIM5 and TIM2 share the same interrupt vector, as do TIM6 and TIM4, UART2 and UART3, ADC1 and ADC2. Refer to Table 30. Table 30. Interrupt vector table differences Priority Source block Interrupt vector address STM8S208x STM8S207x STM8S105x STM8S103x STM8S903x 8 CAN 0x8028 CAN Rx interrupts Reserved Reserved Port F external interrupts 9 CAN 0x802C CAN TX/ER/SC interrupts Reserved Reserved Reserved 13 TIM2/TIM5 0x803C TIM2 Update/Overflow TIM2 Update/Overflow TIM2 Update/Overflow TIM5 Update/Overflow/ Trigger 14 TIM2/TIM5 0x8040 TIM2 Capture/Compare TIM2 Capture/Compare TIM2 Update/Overflow TIM5 Capture/Compare 15 TIM3 0x8044 TIM3 Update/Overflow TIM3 Update/Overflow Reserved Reserved 16 TIM3 0x8048 TIM3 Capture/Compare TIM3 Capture/Compare Reserved Reserved 17 UART1 0x804C UART1 Transmit interrupts Reserved UART1 Transmit interrupts UART1 Transmit interrupts 18 UART1 0x8050 UART1 Receive Interrupts Reserved UART1 Receive Interrupts UART1 Receive Interrupts 20 UART2/ UART3 0x8058 UART3 Transmit interrupts UART2 Transmit interrupts Reserved Reserved 21 UART2/ UART3 0x805C UART3 Receive Interrupts UART2 Receive Interrupts Reserved Reserved |
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