AN2606 datasheet(46/155 Pages) STMICROELECTRONICS

46 / 155 page

STM32F2xxxx devices bootloader

AN2606

46/155

DocID13801 Rev 21

The system clock is derived from the embedded internal high-speed RC for USARTx

bootloaders. This internal clock is also used for CAN and DFU (USB FS Device) but only for

the selection phase. An external clock multiple of 1 MHz (between 4 and 26 MHz) is

required for CAN and DFU bootloader execution after the selection phase.

USART1 bootloader

USART1

Enabled

Once initialized, the USART1 configuration

is: 8 bits, even parity and 1 Stop bit.

USART1_RX pin

Input

PA10 pin: USART1 in reception mode

USART1_TX pin

Output

PA9 pin: USART1 in transmission mode

USART3 bootloader

(on PB10/PB11)

USART3

Enabled

Once initialized, the USART3 configuration

is: 8 bits, even parity and 1 Stop bit.

USART3_RX pin

Input

PB11 pin: USART3 in reception mode

USART3_TX pin

Output

PB10 pin: USART3 in transmission mode

USART3 bootloader

(on PC10/PC11)

USART3

Enabled

Once initialized, the USART3 configuration

is: 8 bits, even parity and 1 Stop bit.

USART3_RX pin

Input

PC11 pin: USART3 in reception mode

USART3_TX pin

Output

PC10 pin: USART3 in transmission mode

USART1 and

USART3 bootloaders

SysTick timer

Enabled

Used to automatically detect the serial baud

rate from the host for USARTx bootloaders.

CAN2 bootloader

CAN2

Enabled

Once initialized, the CAN2 configuration is:

Baudrate 125 kbps, 11-bit identifier.

Note: CAN1 is clocked during CAN2

bootloader execution because CAN1

manages the communication between

CAN2 and SRAM.

CAN2_RX pin

Input

PB5 pin: CAN2 in reception mode

CAN2_TX pin

Output

PB13 pin: CAN2 in transmission mode

DFU bootloader

USB

Enabled

USB OTG FS configured in Forced Device

mode

USB_DM pin

Input/Output

PA11: USB DM line.

USB_DP pin

PA12: USB DP line

No external Pull-up resistor is required

CAN2 and DFU

bootloaders

TIM11

Enabled

This timer is used to determine the value of

the HSE. Once the HSE frequency is

determined, the system clock is configured

to 60 MHz using PLL and HSE.

Table 20. STM32F2xxxx configuration in System memory boot mode (continued)

Bootloader

Feature/Peripheral

State

Comment

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