AN2606 datasheet(86/155 Pages) STMICROELECTRONICS

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STM32F04xxx devices bootloader

AN2606

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DocID13801 Rev 21

STM32F04xxx devices bootloader

19.1

Bootloader configuration

The STM32F04xxx bootloader is activated by applying pattern6 (described in Table 2:

Bootloader activation patterns). The following table shows the hardware resources used by

this bootloader.

Table 42. STM32F04xxx configuration in System memory boot mode

Bootloader

Feature/Peripheral

State

Comment

Common to all

bootloaders

RCC

HSI enabled

The system clock frequency is 48 MHz with

HSI 48 MHz as clock source.

The Clock Recovery System (CRS) is

enabled for the DFU bootloaders to allow

USB to be clocked by HSI 48 MHz.

RAM

6 Kbytes starting from address 0x20000000

are used by the bootloader firmware

System memory

13 Kbytes starting from address

0x1FFFC400, contain the bootloader

firmware

IWDG

The independent watchdog (IWDG)

prescaler is configured to its maximum

value. It is periodically refreshed to prevent

watchdog reset (in case the hardware

IWDG option was previously enabled by the

user).

USART1

bootloader

USART1

Enabled

Once initialized the USART1 configuration

is: 8-bits, even parity and 1 Stop bit

USART1_RX pin

Input

PA10 pin: USART1 in reception mode

USART1_TX pin

Output

PA9 pin: USART1 in transmission mode

USART2

bootloader

USART2

Enabled

Once initialized the USART2 configuration

is: 8-bits, even parity and 1 Stop bit

USART2_RX pin

Input

PA15 pin: USART2 in reception mode

USART2_TX pin

Output

PA14 pin: USART2 in transmission mode

USART1 and

USART2

bootloaders

SysTick timer

Enabled

Used to automatically detect the serial baud

rate from the host for USARTx bootloaders.

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