AN2556 datasheet(22/35 Pages) STMICROELECTRONICS

22 / 35 page

New features

AN2556

22/35

2.3.1

Hardware impacts

None.

2.3.2

Software impacts

The XIRxSEL registers must be configured. If none of the new X-Peripherals are used, that

is, only the X-Peripherals that were already present on ST10F269Zx are used, the following

values must be programmed:

●

XIR0SEL = 0x0100, only CAN1 interrupt is enabled and can generate an interrupt to

the ST10 through XP0IC.

●

XIR1SEL = 0x0100, only CAN2 interrupt is enabled and can generate an interrupt to

the ST10 through XP1IC.

●

XIR2SEL = 0x0, not used.

●

XIR3SEL = 0x2000, only PLL unlock interrupt is enabled and will generate an interrupt

to the ST10 through XP3IC.

Then, in the interrupt routines associated with the XPxIC, the respective flag in the XIRxSEL

registers (a pair for each XIRxSEL) is provided to allow setting and clearing the bits of

XIRxSEL without risking overwriting requests coming after reading the register and before

writing it. Therefore the following registers must be written to clear the flags:

●

In the CAN1 interrupt routine, XIR0CLR (@ EB14h) = 0x0001.

●

In the CAN2 interrupt routine, XIR1CLR (@ EB24h) = 0x0001.

●

In the PLL unlock interrupt routine, XIR3CLR (@ EB44h) = 0x0020.

Additional information on the X-Interrupt multiplexer structure

Figure 1 on page 17 shows that the X-Interrupt sources are connected to the interrupt

request flag of the XIRxSEL registers and to the XPxIR request flag via an AND gate with

I2C Transmit

I2C Error

SSC1 Receive

SSC1 Transmit

SSC1 Error

ASC1 Receive

ASC1 Transmit

ASC1 Transmit Buffer

ASC1 Error

PLL Unlock / OWD

PWM1 Channel 3...0

Table 13.

X-Interrupt detailed mapping (continued)

XP0INT

XP1INT

XP2INT

XP3INT

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