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UPD65 датащи(PDF) 12 Page - NEC |
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UPD65 датащи(HTML) 12 Page - NEC |
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12 / 64 page ![]() 12 µPD64A, 65 Data Sheet U14380EJ2V0DS00 2.8 Arithmetic and Logic Unit (ALU): 4 Bits The arithmetic and logic unit (ALU), which refers to an arithmetic circuit consisting of 4 bits, executes simple manipulations with priority given to logical operations. 2.9 Flags 2.9.1 Status flag (F) Pin and timer statuses can be checked by executing the STTS instruction to check the status flag. The status flag is set (to 1) in the following cases. • If the condition specified with the operand is met when the STTS instruction has been executed • When STANDBY mode is released. • When the release condition is met at the point of executing the HALT instruction. (In this case, the system is not placed in STANDBY mode.) Conversely, the status flag is cleared (to 0) in the following cases: • If the condition specified with the operand is not met when the STTS instruction has been executed. • When the status flag has been set (to 1), the HALT instruction executed, but the release condition is not met at the point of executing the HALT instruction. (In this case, the system is not placed in STANDBY mode.) Table 2-1. Conditions for Status Flag (F) To Be Set by STTS Instruction Operand Value of STTS Instruction Condition for Status Flag (F) To Be Set b3 b2 b1 b0 0000 High level is input to at least one of KI pins. 0 1 1 High level is input to at least one of KI pins. 1 1 0 High level is input to at least one of KI pins. 1 0 1 The down counter of the timer is 0. 1 Either of the combinations [The following condition is added in addition to the above.] of b2, b1, and b0 above. High level is input to at least one of S0, S1, and S2Note pins. Note The use of STOP mode release for the S2 pin must be enabled (bit 3 of P4 register is set to 1.) |
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