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AN2284 датащи(PDF) 16 Page - STMicroelectronics |
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AN2284 датащи(HTML) 16 Page - STMicroelectronics |
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16 / 40 page ![]() 7 ISO 7816-3 - Electronic Signal and Transmission Protocol AN2284 16/40 7.0.1 Card Power-on and Reset When a card is inserted into a reader, no power is applied to any of the contacts. The chip on the card could be seriously damaged by applying power to the wrong contacts, and this situation could easily occur if a card were inserted across powered contact points. The contacts remain unpowered until an edge detector determines that the card is properly aligned with the contact points to within some acceptable (for the reader) mechanical tolerance. When the reader detects that the card is properly inserted, power is applied to the card. First, the contacts are brought to a coherent idle state, as shown in Table 3.4. A reset signal is then sent to the card via the RST contact line. The idle state occurs when the power (VCC) contact is brought up to a normal, stable operating voltage of 5V. An initial power setting of 5V is always applied first, even though some microprocessor chips being introduced operate at 3V when in an I/O state. The I/O contact is set to a reception mode on the reader side and a stable clock (CLK) is applied. The reset line is in a low state. It must remain in a low state for at least 40,000 CLK cycles before a valid reset sequence can be started by the reader, raising the reset line to a high state. Figure 5. Answer to Reset 7.0.2 Data Transfer Data transfer between the reader and the card occurs through the concerted action of two of the contact lines: CLK and I/O. The I/O line conveys a single bit of information per unit of time as defined by the CLK depending on its voltage relative to GND. A 1 bit can be conveyed either through a +5V value or through a 0V value. The actual convention used is determined by the card and is conveyed to the reader through the "initial character" of the ATR, which is referenced as TS. To transfer 1 byte of information, 10 bits are actually moved across the I/O line; the first is always a "start bit" and the last is always a parity bit used to convey even parity. Considering that the I/O line can be (in one bit period) either in a high (H) state or a low (L) state, the TS character of the form HLHHLLLLLLH signals that the card wants to use the "inverse convention," meaning that H corresponds to a 0 and L corresponds to a 1. A TS |
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