UPD64 datasheet(28/68 Pages) NEC

28 / 68 page

µPD63, 63A, 64

7.1 Functions of POC Circuit

The POC circuit has the following functions:

• Generates an internal reset signal when VDD

≤ VPOC.

• Cancels an internal reset signal when VDD > VPOC.

Here, VDD: power supply voltage, VPOC: POC-detected voltage.

Notes 1. In reality, there is the oscillation stabilization wait time until the circuit is switched to OPERATING

mode. The oscillation stabilization wait time is about 252/fX to 700/fX (when about 70 to 190

µs; fX

= 3.64 MHz).

2. For the POC circuit to generate an internal reset signal when the power supply voltage has fallen,

it is necessary for the power supply voltage to be kept less than the VPOC for the period of 1 ms or

more. Therefore, in reality, there is the time lag of up to 1 ms until the reset takes effect.

3. The POC-detected voltage (VPOC) varies between 0.9 to 2.2 V; thus, the resetting may be canceled

at a power supply voltage smaller than the assured range (VDD = 1.8 to 3.6 V). However, as long as

the conditions for operating the POC circuit are met, the actual lowest operating power supply voltage

becomes lower than the POC-detected voltage. Therefore, there is no malfunction occurring due to

the shortage of power supply voltage. However, malfunction for such reasons as the clock not

oscillating due to low power supply voltage may occur (refer to Cautions 3. in 7. POC CIRCUIT).

7.2 Oscillation Check at Low Supply Voltage

A reliable resetting operation can be expected of the POC circuit if it satisfies the condition that the clock can

oscillate even at low power supply voltage (the oscillation start voltage of the resonator being even lower than the

POC-detected voltage). Whether this condition is being met or not can be checked by measuring the oscillation

status on a product which actually contains a POC circuit, as follows.

<1> Connect a storage oscilloscope to the XOUT pin so that the oscillation status can be measured.

<2> Connect a power supply whose output voltage can be varied and then gradually raise the power supply

voltage VDD from 0 V (making sure to avoid VDD > 3.6V).

At first (during VDD < 0.9 V), the XOUT pin is 0 V regardless of the VDD. However, at the point that VDD reaches

the POC-detected voltage (voltage somewhere between VPOC = 0.9 to 2.2 V), the voltage of the XOUT pin jumps to

about 0.5 VDD. Maintain this power supply voltage for a while to measure the waveform of the XOUT pin. If, by any

chance, the oscillation start voltage of the resonator is lower than the POC-detected voltage, the growing oscillation

of the XOUT pin can be confirmed within several ms after the VDD has reached the VPOC.

VDD

3.6 V

2.2 V

VPOC

0.9 V

0 V

Internal reset signal

Reset

Operating ambient temperature TA = – 20 to + 70°C

Clock frequency fX = 2.4 to 4 MHz

←POC-detected voltage VPOC = 0.9 to 2.2 VNote 3

→ t

OPERATING mode

↑ Reset

Note 2

↑

Note 1

UPD64 датащи(PDF) 28 Page - NEC

UPD64 датащи(HTML) 28 Page - NEC

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

датащи скачать

ссылки URL