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HOW TO MINIMIZE THE ST7 POWER CONSUMPTION

7.2.3 Conclusion

Temporization period exists only in Halt mode in case of Interrupt, because during all other

modes (except Halt mode) oscillator is ON. So, in HALT mode, the MCU needs 256 CPU cy-

cles as temporization period, during that time it consumes some current.

* Wake-Up frequency is the external interrupt frequency (Wake-Up time is the time after which

the MCU is woken up from the different modes (Wait, Slow-Wait, Halt)).

7.3 EXAMPLE 3: APPLICATION WITH PERIODIC WAKEUP AND WATCHDOG

For this example, we assume that for the application the Watchdog Timer (WDG) has to re-

main active and that the microcontroller has to stay in low power mode for an undefined time

period. Therefore, Halt mode can not be used, as the “Halt” instruction resets the microcon-

troller when the WDG is active and WDGHALT option bit in the option byte is set to 1. When

the WDGHALT option bit in the option byte is 0 and WDG is active, a “Halt” instruction doesn’t

generate a Watchdog reset. In this case, the MCU enters Halt mode. The Watchdog counter

is decremented once and then stops counting and is no longer able to generate a watchdog

reset until the MCU receives an external interrupt or reset. Active-Halt mode can also not be

used, because, the device cannot spend more than a defined period in this power saving

mode. Consequently, Wait mode is used, associated with Slow mode configured for the

when it is woken-up. Of course, to reduce power consumption further, Halt mode should be

used wherever possible.

In terms of applications, users usually try to optimize the power consumption during the wait

loop in the main program. In this configuration the microcontroller is mostly idle, waiting for an

external event, or regularly woken-up by an internal timer event. In our case, we decided to put

the ST7 core in Wait For Interrupt state, with one timer active to regularly wake up the core.

This enables the core to refresh the WDG to prevent a watchdog reset. The clock driving the

active peripherals and the core when it is active corresponds to the slowest clock available. It

is the oscillator clock divided by 2 then divided by 32. So the clock driving the peripherals and

tion.

7.3.1 Measurement Configuration

In this mode, the MCU is configured as below, but of course in the application this configura-

tion may differ, in particular the I/O port used.