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AN910 датащи(PDF) 34 Page - STMicroelectronics |
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AN910 датащи(HTML) 34 Page - STMicroelectronics |
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34 / 51 page ![]() 34/51 ST7 AND ST9 PERFORMANCE BENCHMARKING 7.3.7 68HC11 MCU core On-chip/Off-chip buses - on-chip buses 16-bit address bus 8-bit data/program memory bus - off-chip buses 8/16-bit address bus 8-bit data/program memory bus the two buses are multiplexed with ports Memory Space Von Neumann organization - linear data/program memory space 64 kbytes 256-byte zero page 64-byte peripheral register space upper 41-byte interrupt vector table 18 interrupts Arithmetic Logic Unit 8-bit datapath - 8/16-bit operations - special functions 8x8 unsigned multiplication 10 cycles 16/16 unsigned integer division 41 cycles 16/16 unsigned fractional division 41 cycles Instruction processing Standard - sequential processing Cpu internal buses 16-bit address bus, 8-bit data bus (to be confirmed) Instruction set Cisc encoding - CPI 2 cycles to 41 cycles - average CPI between 6 and 7 cycles - IL 1 byte to 3 bytes - average IL between 2 and 3 bytes - special instructions exchange register contents Programming model Accumulators - two 8-bit accumulators useable as one 16-bit accumulator - two 16-bit index registers - other registers 16-bit program counter 16-bit stack pointer condition code register + / x 68HC11 CPU LDAA #8, X ADDB #A0 |
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