UPD30121 datasheet(18/76 Pages) NEC

18 / 76 page

Data Sheet U14691EJ1V0DS00

µµµµPD30121

(2/4)

Pin Name

After Reset by

the RTC Reset

After Reset by the

Deadman’s Switch

or RSTSW# Signal

In the Suspend

Mode

In the Hibernate

Mode or Shut Down

by the HAL Timer

During a Bus

Hold

SHB#

Hi-Z

IOR#

Hi-Z

IOW#

Hi-Z

MEMR#

Hi-Z

MEMW#

Hi-Z

ZWS#

−−

−

RSTOUT

Hi-Z

Note 1

IOCS16#

−−

−

MEMCS16#

−−

−

IOCHRDY

−−

−

HLDRQ#

−−

−

HLDACK#

Hi-Z

Note 1

Hi-Z

Note 1

CKE

Note 2

Note 3

Hi-Z

RTCX1

−−

−

RTCX2

−−

−

CLKX1

−−

−

CLKX2

−−

−

FIRCLK

−−

−

BATTINH/

BATTINT#

−−

−

MPOWER

POWERON

POWER

−−

−

RSTSW#

−−

−

RTCRST#

−−

−

RxD

−−

−

TxD/CLKSEL2

Hi-Z

Note 4

Note 1

RTS#/CLKSEL1

Hi-Z

Note 4

Note 1

CTS#

−−

−

DCD#/GPIO15

−−

−

DTR#/CLKSEL0

Hi-Z

Note 4

Note 1

DSR#

−−

−

IRDIN

−−

−

IRDOUT#

Note 1

FIRDIN#/SEL

Hi-Z

Note 3

Hi-Z

Note 3

Notes 1.

Normal operation proceeds.

This differs depending on the setting of the SCLK bit in the SDRAMMODEREG register.

When SCLK bit has a value of "1": outputs clock.

When SCLK bit has a value of "0": low level is output.

Maintains the state of the previous Full-speed Mode.

Specify the input data level using a high-resistance pull up or pull down resistor.

Remark 0: low level, 1: high level, Hi-Z: high impedance

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