AN3286 datasheet(30/42 Pages) STMICROELECTRONICS

30 / 42 page

Testing the board

AN3286

30/42

Doc ID 17998 Rev 1

2.9

Output overvoltage protection

During the power MOSFET OFF time the voltage generated by the auxiliary winding tracks

the converter’s output voltage, through the transformer’s auxiliary-to-secondary turn ratio.

The diode D2 is forward biased, and the voltage divider made up of R14 and R3 (see

Figure 2 and Figure 35) between the auxiliary winding and the ZCD pin performs an output

voltage monitor function; if the voltage applied to the ZCD pin exceeds the internal VOVP

threshold (4.2 V typical) for four consecutive switching cycles, the controller recognizes an

overvoltage condition and shuts down the converter. This is done to provide high noise

immunity and avoid spikes erroneously tripping the protection. To re-enable operation the

VDD voltage must be recycled.

As the value of R3 has already been selected as a consequence of the maximum output

power that the converter must deliver, R14 can be chosen according to the following formula

to reach the desired output overvoltage threshold, VOUT_OVP:

Equation 4

where Vγ D2 and Vγ D4 are the forward drop of the diodes D2 and D4 respectively, NAUX and

NSEC are the auxiliary and secondary turns numbers respectively, and IZCD is the pull-up

current exiting the ZCD pin.

The above formula, solved for VOUT_OVP, gives about 6.5 V for the setting of the presented

board.

This value has been verified experimentally, short-circuiting the lower resistor (R9) of the

output voltage divider and therefore producing an output overvoltage, as shown in the

figures below. In Figure 37 it is possible to see that, as VOUT reaches the value of about

6.5 V, the converter stops switching. In the same figure the ZCD pin voltage and the FB pin

voltage are given. The crest value of the ZCD pin voltage during the MOSFET OFF time

tracks the output voltage. The converter is shut down as the ZCD pin voltage reaches the

VOVP threshold (4 V, within the tolerance), as shown in Figure 38.

OVP

R14

()

OVP

LIM

R 3

()

--------------------------

ZCD

–

--------------------------------------------

AUX

SEC

--------------

OU T OVP

VϒD4 VϒD2

–

() V

OVP

–

⋅⋅

Figure 37.

Output overvoltage protection at

115 VAC 0.2 A

Figure 38.

Output overvoltage protection at

115 VAC 0.2 A - zoom

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