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AN3119 датащи(PDF) 14 Page - STMicroelectronics |
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AN3119 датащи(HTML) 14 Page - STMicroelectronics |
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14 / 32 page ![]() Test results and significant waveforms AN3119 14/32 Doc ID 16849 Rev 2 filtering needs. In fact, a large capacitance introduces a conduction dead-angle of the AC input current in itself, therefore reducing the effectiveness of the optimizer circuit. In Figure 18 the detail of the waveforms at switching frequency shows the operation of the transition mode control; once the inductor has transferred all the energy stored, a falling edge on the ZCD pin (#11) is detected and it triggers a new on-time by setting the gate drive high. Once the current signal on the CS pin (#4) has reached the level programmed by the internal multiplier circuitry, according to the input mains instantaneous voltage and the error amplifier output level, the gate drive is set low and MOSFET conduction is stopped. During the following off-time the energy stored in the inductor is transferred into the output capacitor and to the load. At the end of the current conduction a new demagnetization is detected by the ZCD which provides for a new on-time of the MOSFET. In Figure 19 the waveforms of the MULT, VFF, INV, and COMP pins are shown. Figure 16. EVL6563S-250W TM PFC: MOSFET current at 100 Vac - 50 Hz - full load Figure 17. EVL6563S-250W TM PFC: MOSFET current at 100 Vac - 50 Hz - full load CH1: Q1 gate voltage, CH2: Q2 gate voltage, CH3: Q1 drain current CH4: Q2 drain current CH1: Q1 gate voltage, CH2: Q2 gate voltage CH3: Q1 drain current CH4: Q2 drain current Figure 18. EVL6563S-250W TM PFC: L6563S control pins-1 at 115 Vac - 60 Hz - full load Figure 19. EVL6563S-250W TM PFC: L6563S control pins-2 at 115 Vac - 60 Hz - full load CH1: GD - pin #13, CH2: ZCD - pin #11, CH3: CS - pin #4 CH4: MULT - pin #3 CH1: INV - pin #1, CH2: MULT - pin #3, CH3: COMP - pin #2 CH4: VFF - pin #5 |
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