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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AN3112 датащи(PDF) 23 Page - STMicroelectronics |
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AN3112 датащи(HTML) 23 Page - STMicroelectronics |
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23 / 36 page  AN3112 Designing a fixed-off-time PFC Doc ID 16820 Rev 3 23/36 The power dissipated by Rs is given by: Equation 46 According to the result, for example four parallel resistors of 0.47 Ω with 1 W of power rating can be selected. Pin 3 (MULT): The MULT pin is the second multiplier input. It is connected, through a resistive divider, to the rectified mains to obtain a sinusoidal voltage reference. The multiplier is described by the relationship: Equation 47 Where: ● VCS (Multiplier output) is the reference for the current sense (VCS_OFFSET is its offset). ● k = 0.45 (Typ.) is the multiplier gain. ● VCOMP is the voltage on pin 2 (E/A output). ● VMULT is the voltage on pin 3.VFF is the second input to the multiplier for 1/V^2 function. It compensates the control loop gain dependence on the mains voltage. The voltage at this pin is a DC level equal to the peak voltage on the MULT pin (#3). A complete description is given in the diagram in Figure 14 and Figure 15 which shows the typical multiplier characteristics family. The linear operation of the multiplier is guaranteed within the range 0 to 3 V of VMULT and the range 0 to 1.16 V (typ.) of Vcs, while the minimum guaranteed value of the maximum slope of the characteristics family (typ.) is: 2 rms s s ISW R P ⋅ = () W 14 . 2 22 . 4 12 . 0 P 2 s = ⋅ Ω = 2 FF MULT COMP m OFFSET _ CS CS V V ) V 5 . 2 V ( k V V ⋅ − ⋅ + = Figure 14. Multiplier characteristics family for VFF =1 V Figure 15. Multiplier characteristics family for VFF=3 V |
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