AN2960 datasheet(22/41 Pages) STMICROELECTRONICS

номер детали	AN2960

подробное описание детали	ultra compact linear accelerometer

PDF	41 Pages

Scroll/Zoom	100%

производитель	STMICROELECTRONICS [STMicroelectronics]

домашняя страница	http://www.st.com

Logo

22 / 41 page

About control registers

AN2960

22/41

Doc ID 15557 Rev 1

The IHL bit selects the polarity of the interrupt signal. When IHL is ‘0’ (default value) any

interrupt event is signalled with a logical 1.

The PP_OD bit defines whether the interrupt pad should operate in Push-pull or in Open

Drain mode. The latter is specifically intended for wired-OR connection of multiple interrupt

signals on the same interrupt line. The default value is ‘0’ which corresponds to Push-pull

mode.

The I2CFG[2:0] and I1CFG[2:0] bits select which signal should be sent out from the INT2

and INT1 interrupt pads as described in the following table:

Two completely independent interrupt blocks are available in the LIS331DL: FF_WU1 and

FF_WU2. They can be configured using the registers described in Section 8.

HP filtered data can be selected for further processing by the Interrupt Generator block by

setting the desired values for the HP FF_WU1 and HP FF_WU2 bits in CTRL_REG2. The

default value is '0' and corresponds to the use of non-filtered data. The output of the

Interrupt Generator block is used to load the FF_WU_SRC_1 and FF_WU_SRC_2

registers.

I2CFG2

I2CFG1

I2CFG0

INT2 pin

I1CFG2

I1CFG1

I1CFG0

INT1 pin

GND

001

FF_WU 1

010

FF_WU 2

FF_WU1 or FF_WU2

100

DataReady

111

AN2960 датащи(PDF) 22 Page - STMicroelectronics