Testing the board

AN2864

24/29

Doc ID 15282 Rev 1

3.7

Output overvoltage protection

Output over-voltage protection is implemented by monitoring the voltage across the auxiliary

winding during the MOSFET off time through the D2 diode and the resistor dividers R3 and

R14 (see schematic in Figure 2), which are connected to the CONT pin of the VIPER17L. If

voltage must be recycled. In order to provide high noise immunity and avoid spikes

erroneously triggering the protection, a digital filter is implemented so that the CONT pin has

operation.

Figure 23.

OVP circuit

The value of the output voltage when the protection should be triggered can be set through

proper selection of the resistor dividers R3 and R14. While R3 is selected with consideration

to the maximum power that the converter has to manage, R14 is selected according to the

following formula.

Equation 2

The protection is tested by disconnecting the opto-coupler from the feedback pin and light

loading the converter. In this way the converter operates in open loop and delivers the most

power possible. The excess power over the load charges the output capacitance, increasing

the output voltage, since the OVP is tripped and the converter stops working.

In Figure 24 it can be observed that the output voltage (Ch1, yellow waveform) increases

and as it reaches the value of 6.6 V the converter stops switching. In the same figure the

CONT pin voltage (Ch3, magenta waveform) and the drain current (Ch4, green waveform)

are shown. The crest value of the CONT pin voltage tracks the output voltage. In Figure 25,

the last switching cycles before the protection is triggered are reported in detail.

Current Limit C ompa rator

OVP DETECTION

LOGI C

Rlim

Dov p (D 2)

Aux iliary

winding

F rom SenseF ET

To OVP Protection

To PWM Logic

Curr. Lim .

BLOCK

(R2)

CONT PIN

R ov p (R14)

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

−

−

⋅

⋅

=

V

3

V

V

N

N

V

3

R

R

)

2

D

_(

ovp

D

_

drop

OVP

_

OUT

s

AUX

)

2

R

_(

LIM

)

14

R

_(

OVP