UM0934 datasheet(47/113 Pages) STMICROELECTRONICS

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UM0934

Host interface

Doc ID 17389 Rev 2

47/113

Table 18.

CMD_SynchroIndication: SyncData (MAC mode)

Byte index

Label

Description

SYNC

Status of synchronization change:

1: Synchronization FOUND

2: Synchronization CONFIRMED

4: Synchronization LOST

5: Synchronization INTELLIGENT (0x05)

Other bytes differ according to the SYNC byte status If SYNC = 1 (Synchronization FOUND)

1..3

Amplitude of signal on channel 0. Raw estimation performed on received

preamble + SSD sequence (Section : Raw estimation).

4..6

Amplitude of noise on channel 0. Raw estimation performed on received

preamble + SSD sequence (Section : Raw estimation)

7..9

Amplitude of signal on channel 1. Raw estimation performed on received

preamble + SSD sequence (Section : Raw estimation).

10..12

Amplitude of noise on channel 1. Raw estimation performed on received

preamble + SSD sequence (Section : Raw estimation)

PGA

Gain of the reception PGA.

PHASE Electrical delta-phase

If SYNC = 2 (Synchronization CONFIRMED)

PAD

Padding byte. Not used.

2..3

Source address

4..5

Destination address

If SYNC = 4 (Synchronization LOST)

1CAUSE

1: Timeout not addressed expired

2: Timeout frame not OK expired

3: Timeout synchronization confirm expired

4: Addressed by a wrong initiator

5: Desynchronization request from host (by accessing MIB object 00A0h,

Section 6.5.29)

2..3

ADD1

Local MAC address (if CAUSE = 1, 2, 3, 5, 6, 7, 8)

Source MAC address (if CAUSE = 4)

4..5

ADD2

Initiator MAC address (if CAUSE = 1, 2, 3, 5, 6, 7, 8)

Destination MAC address (if CAUSE = 4)

If SYNC = 5 (Synchronization INTELLIGENT)

1CAUSE

LM_IS_INIT (06h): Synchronization AutoReject after the reception of a valid

MAC frame by an Initiator (MAC address within FIMA, LIMA interval) during

Intelligent Synchronization first phase

LM_IS_SYNC_FAST (07h): Fast Synchronization achieved

LM_IS_NOT_INIT (08h): Synchronization AutoReject after the reception of a

valid MAC frame by a node not configured as Initiator (MAC address not within

FIMA, LIMA interval) during Intelligent Synchronization first phase

2..3

ADD

Initiator MAC Address

4..5

Max Received Signal level (between S0, S1), expressed as 100*dBµV

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