2.1-channel application using one device

AN4569

12/29

DocID026803 Rev 1

In single-ended applications the output signal must vary between -Vcc/2 and +Vcc/2 instead

of -Vcc +Vcc as in BTL mode. For this reason a dedicated electrolytic capacitor must be

connected between the PWM output and speaker as shown in Figure 8.

The purpose of the resistive divider (R5 and R6 for OUT1, R7 and R8 for OUT2) is to take

the output at half the supply when the device is in tri-state. The aim is to charge slowly the

decoupling capacitor at the turn-on of the power supply in order to avoid “pops”.

The value of the electrolytic capacitor is related to the load impedance and the lower limit of

the audio bandwidth. The value is determined using the following formula:

Equation 3

Series capacitor value in SE configuration

To improve the audio performance (pop and noise) and to reduce the size of components, it

is possible to split the electrolytic capacitor into two capacitors of equal value (half the

value), as shown in Figure 9.

In this case the output speaker is not connected to GND, but it is connected to the same

potential as the PWM output (virtual GND). To avoid a "pop", the bridge must be muted for 4

or more R * C time constant where R = R7 and C = C22.

The recommended schematic is shown in Figure 9.

2.2

Software configuration

In order to set the device in 2.1-channel configuration, change the register configuration

0x05 (configuration register F) from 0x5C (default) to 0x5D.

To switch on the power bridge, set to one the bit D7 of register 0x05.

Table 2. DC cut - resistor and capacitor values

Rload

8 Ω

6Ω

4 Ω

3 Ω

R5, R6, R7, R8

6.2 kΩ

4.7 kΩ

3.3 kΩ

2.7 kΩ

C19, C20, C21, C22

82 μF

100 μF

180 μF

220 μF

1

2

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