Phase calibration

AN2299

20/26

Rev2

The relative error on power depends on phase angle

φ and phase angle error δ, and it

shows a symmetrical behavior regarding positive and negative phase angles (eg. +60° and

-60°). The influence of

δ is small at cosφ = 1, but becomes very big at small cosφ values.

This additional contribution to the total error from the phase angle error is usually referred to

as "related to apparent power" and can be expressed as follows:

As shown in Eq. 32 errors associated with phase mismatch are particularly noticeable at low

power factors, e.g. with a specified error for power of

±0.01% the error tolerance for typical

power factors will be:

4.2

Phase error compensation in STPM01 based energy meters

A good Rogowski coil or Shunt would normally have a phase error small enough that there

is no need for phase compensation. This also valid for the type of CT which are built on the

ST measurement modules.

Otherwise, if the sensor is not very accurate also phase compensation needs to be

performed. Since this process increases calibration time of at least 3 times more, it is

advisable to find the best compensation value for a certain type of current sensor and then

use such value for compensation of all modules.

STPM01 provides a means of digitally calibrating small phase errors. Calibration is obtained

by introducing delays on voltage or current signal. The extent of phase compensation can

be set using the 4 bits of the phase calibration register (CPH).

The default value of this register is 0, which gives 0° phase compensation. When the 4 bits

are set (CPH = 15) the compensation is +0.576°. The resolution step of the phase

compensation is 0.038°.

Phase calibration should be carried out after amplitude calibration. The method to follow is

the same for both traditional power calibration and fast calibration approach.

As phase errors are amplified with power factor, to make them more evident a phase shift of

60° between line voltage and current is introduced.

In this case Eq. 1 becomes:

CPH bits need to be changed in such a way to achieve this target power, either reading

active power from DAP register (fast digital calibration approach) or measuring LED pin

output frequency (traditional calibration approach).

Table 4.

Error tolerance vs. power factor

PF

E[%]

1

±0.01%

0.5

±0.02%

0.25

±0.04%

ee

PF

1

=

S

P

----

•

=

PF

----------------

==

Eq. 33

P

UI

•

2

-----------

=

Eq. 34