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DATA BUS

RA1/RA0

RD/WE = (MRD)

WR/WE = (TPB)

I/O SPACE

RD/WE = (MWR)

WR/RE = (MRD)

MEMORY SPACE

CS

CLOCK = (TPA)

DATA-OUT

STROBE

RDY

INT

VALID DATA OUT

VALID PORT ADDRESS

IO OR II

VALID DATA

NOTE:

1. Write is the overlap of WR/RE = 1 and RD/WE = 0

FIGURE 7. OUTPUT MODE TIMING WAVEFORMS

CDP1851, CDP1851C