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AD5373 датащи(PDF) 5 Page - Analog Devices |
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AD5373 датащи(HTML) 5 Page - Analog Devices |
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5 / 29 page ![]() AD5372/AD5373 Rev. C | Page 4 of 28 SPECIFICATIONS DVCC = 2.5 V to 5.5 V; VDD = 9 V to 16.5 V; VSS = −16.5 V to −8 V; VREF0 = VREF1 = 3 V; AGND = DGND = SIGGNDx = 0 V; CL = open circuit; RL = open circuit; gain (M), offset (C), and DAC offset registers at default values; all specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter AD53721 B Version AD53731 B Version Unit Test Conditions/Comments2 ACCURACY Resolution 16 14 Bits Integral Nonlinearity (INL) ±4 ±1 LSB max Differential Nonlinearity (DNL) ±1 ±1 LSB max Guaranteed monotonic by design over temperature Zero-Scale Error ±10 ±10 mV max Before calibration Full-Scale Error ±10 ±10 mV max Before calibration Gain Error 0.1 0.1 % FSR Before calibration Zero-Scale Error2 1 1 LSB typ After calibration Full-Scale Error2 1 1 LSB typ After calibration Span Error of Offset DAC ±35 ±35 mV max See the Offset DACS section for details VOUTx Temperature Coefficient 5 5 ppm FSR/°C typ Includes linearity, offset, and gain drift DC Crosstalk2 100 100 μV max Typically 20 μV; measured channel at midscale, full-scale change on any other channel REFERENCE INPUTS (VREF0, VREF1)2 VREFx Input Current ±10 ±10 μA max Per input; typically ±30 nA VREFx Range 2/5 2/5 V min/V max ±2% for specified operation SIGGND INPUTS (SIGGND0 TO SIGGND3)2 DC Input Impedance 50 50 kΩ min Typically 55 kΩ Input Range ±0.5 ±0.5 V min/V max SIGGNDx Gain 0.995/1.005 0.995/1.005 min/max OUTPUT CHARACTERISTICS2 Output Voltage Range VSS + 1.4 VSS + 1.4 V min ILOAD = 1 mA VDD − 1.4 VDD − 1.4 V max ILOAD = 1 mA Nominal Output Voltage Range −4 to +8 −4 to +8 V min/V max Short-Circuit Current 15 15 mA max VOUTx to DVCC, VDD, or VSS Load Current ±1 ±1 mA max Capacitive Load 2200 2200 pF max DC Output Impedance 0.5 0.5 Ω max DIGITAL INPUTS JEDEC compliant Input High Voltage 1.7 1.7 V min DVCC = 2.5 V to 3.6 V 2.0 2.0 V min DVCC = 3.6 V to 5.5 V Input Low Voltage 0.8 0.8 V max DVCC = 2.5 V to 5.5 V Input Current ±1 ±1 μA max Excluding CLR pin CLR High Impedance Leakage Current ±20 ±20 μA max Input Capacitance2 10 10 pF max DIGITAL OUTPUTS (SDO, BUSY) Output Low Voltage 0.5 0.5 V max Sinking 200 μA Output High Voltage (SDO) DVCC − 0.5 DVCC − 0.5 V min Sourcing 200 μA SDO High Impedance Leakage Current ±5 ±5 μA max High Impedance Output Capacitance2 10 10 pF typ |
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