80C188EB13 datasheet(54/59 Pages) INTEL

54 / 59 page

80C186EB80C188EB 80L186EB80L188EB

INSTRUCTION SET SUMMARY (Continued)

80C186EB

80C188EB

Function

Format

Clock

Comments

Cycles

DATA TRANSFER

(Continued)

SEGMENT e Segment Override

00101110

00110110

00111110

00100110

ARITHMETIC

ADD e Add

Regmemory with register to either

000000dw

mod reg r m

310

Immediate to registermemory

100000sw

mod000 r m

data

data if s we01

416

Immediate to accumulator

0000010w

data

data if we1

816-bit

ADC e Add with carry

Regmemory with register to either

000100dw

mod reg r m

310

Immediate to registermemory

100000sw

mod010 r m

data

data if s we01

416

Immediate to accumulator

0001010w

data

data if we1

816-bit

INC e Increment

Registermemory

1111111w

mod000 r m

315

01000 reg

SUB e Subtract

Regmemory and register to either

001010dw

mod reg r m

310

Immediate from registermemory

100000sw

mod101 r m

data

data if s we01

416

Immediate from accumulator

0010110w

data

data if we1

816-bit

SBB e Subtract with borrow

Regmemory and register to either

000110dw

mod reg r m

310

Immediate from registermemory

100000sw

mod011 r m

data

data if s we01

416

Immediate from accumulator

0001110w

data

data if we1

816-bit

DEC e Decrement

Registermemory

1111111w

mod001 r m

315

01001 reg

CMP e Compare

Registermemory with register

0011101w

mod reg r m

310

0011100w

mod reg r m

310

Immediate with registermemory

100000sw

mod111 r m

data

data if s we01

310

Immediate with accumulator

0011110w

data

data if we1

816-bit

NEG e

Change sign registermemory

1111011w

mod011 r m

310

AAA e

ASCII adjust for add

00110111

DAA e

Decimal adjust for add

00100111

AAS e

ASCII adjust for subtract

00111111

DAS e

Decimal adjust for subtract

00101111

MUL e

Multiply (unsigned)

1111011w

mod 100 r m

26–28

35–37

Memory-Byte

32–34

Memory-Word

41–43

Shaded areas indicate instructions not available in 80868088 microsystems

NOTE

Clock cycles shown for byte transfers For word operations add 4 clock cycles for all memory transfers

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