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Data Sheet

AD5231

Rev. D | Page 19 of 28

Using Additional Internal Nonvolatile EEMEM

The AD5231 contains additional user EEMEM registers for

storing any 16-bit data such as memory data for other compo-

nents, look-up tables, or system identification information.

Table 9 provides an address map of the internal storage registers

shown in the functional block diagram as EEMEM1, EEMEM2,

and 28 bytes (14 addresses × 2 bytes each) of user EEMEM.

Table 9. EEMEM Address Map

Address

EEMEM for…

0000

RDAC1, 2

0001

O1 and O23

0010

USER14

0011

USER2

…

1110

USER13

1111

USER14

RDAC data stored in EEMEM location is transferred to the RDAC register at

power-on, or when Instruction 1, Instruction 8, or PR are executed.

Execution of Instruction 1 leaves the device in the read mode power

consumption state. After the last Instruction 1 is executed, the user should

perform a NOP, Instruction 0 to return the device to the low power idling

state.

O1 and O2 data stored in EEMEM locations is transferred to the

corresponding digital register at power-on, or when Instruction 1 and

Instruction 8 are executed.

USERx are internal nonvolatile EEMEM registers available to store 16-bit

information using Instruction 3 and restore the contents using Instruction 9.

RDAC STRUCTURE

The patent-pending RDAC contains multiple strings of equal

resistor segments with an array of analog switches that act as the

wiper connection. The number of positions is the resolution of

the device. The AD5231 has 1024 connection points, allowing it

to provide better than 0.1% settability resolution. Figure 43

shows an equivalent structure of the connections among the

three terminals of the RDAC. The SWA and SWB are always on,

while the switches SW(0) to SW(2N−1) are on one at a time,

depending on the resistance position decoded from the data

bits. Because the switch is not ideal, there is a 15 Ω wiper

resistance, RW. Wiper resistance is a function of supply voltage

and temperature. The lower the supply voltage or the higher the

temperature, the higher the resulting wiper resistance. Users

should be aware of the wiper resistance dynamics if accurate

prediction of the output resistance is needed.

SW(1)

SW(0)

SWB

SWA

SW(2N–1)

SW(2N–2)

RS = RAB/2N

DIGITAL

CIRCUITRY

OMITTED FOR

CLARITY

RDAC

WIPER

AND

DECODER

Figure 43. Equivalent RDAC Structure (Patent Pending)

Table 10. Nominal Individual Segment Resistor (RS)

Device

Resolution

10 kΩ

Version

50 kΩ

Version

100 kΩ

Version

10-Bit

9.8 Ω

48.8 Ω

97.6 Ω

PROGRAMMING THE VARIABLE RESISTOR

Rheostat Operation

The nominal resistance of the RDAC between Terminal A and

Terminal B, RAB, is available with 10 kΩ, 50 kΩ, and 100 kΩ

with 1024 positions (10-bit resolution). The final digit(s) of the

part number determine the nominal resistance value, for

example, 10 kΩ = 10; 50 kΩ = 50; 100 kΩ = C.

The 10-bit data-word in the RDAC latch is decoded to select

one of the 1024 possible settings. The following discussion

describes the calculation of resistance RWB at different codes of a

10 kΩ part. For VDD = 5 V, the wiper’s first connection starts at

Terminal B for data 0x000. RWB(0) is 15 Ω because of the wiper

resistance, and because it is independent of the nominal

resistance. The second connection is the first tap point where

RWB (1) becomes 9.7 Ω + 15 Ω = 24.7 Ω for data 0x001. The

third connection is the next tap point representing RWB (2) =

19.4 Ω + 15 Ω = 34.4 Ω for data 0x002 and so on. Each LSB data

value increase moves the wiper up the resistor ladder until the

last tap point is reached at RWB (1023) = 10,005 Ω. See Figure 43

for a simplified diagram of the equivalent RDAC circuit. When

RWB is used, Terminal A can be left floating or tied to the wiper.

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