5

5/90, Rev. B1

SSM-2120/SSM-2122 DYNAMIC RANGE PROCESSOR/DUAL VCA

With the use of the LOG AV capacitor the output is then the log

of the average of the absolute value of I

IN

.

(The unfiltered LOG AV output has broad flat plateaus with sharp

negative spikes at the zero crossing. This reduces the “work” that

the averaging capacitor must do, particularly at low frequencies.)

Note: It is natural to assume that with the addition of the averag-

ing capacitor, the LOG AV output would become the average of

the log of the absolute value of I

IN

. However, since the capaci-

tor forces an AC ground at the emitter of the output transistor,

the capacitor charging currents are proportional to the antilog

of the voltage at the base of the output transistor. Since the base

voltage of the output transistor is the log of the absolute value of

I

IN

, the log and antilog terms cancel, so the capacitor becomes a

linear integrator with a charging current directly proportional to

the absolute value of the input current. This effectively inverts

the order of the averaging and logging functions. The signal at

the output therefore is the log of the average of the absolute

value of I

IN

.

USING DETECTOR PINS REC

IN

, LOG

AV

, THRESH

AND CON

OUT

When applying signals to REC

IN

(rectifier input) an input series

resistor should be followed by a low leakage blocking capacitor

since REC

IN

has a DC voltage of approximately 2.1V above

ground. Choose R

IN

for a

±1.5mA peak signal. For ±15V opera-

tion this corresponds to a value of 10k

Ω.

A 1.5M

Ω value of R

REF

from log average to –15V will establish a

10

µA reference current in the logging transistor (Q

1

). This will

bias the transistor in the middle of the detector’s dynamic cur-

rent range in dB to optimize dynamic range and accuracy. The

LOG AV outputs are buffered and amplified by unipolar drive op

amps. The 39k

Ω, 1kΩ resistor network at the THRESH pin pro-

vides a gain of 40.

An attenuator from the CON

OUT

(control output) to the appropri-

ate VCA control port establishes the control sensitivity. Use 200

Ω

for the attenuator resistor to ground and choose R

CON

for the

desired sensitivity. Care should be taken to minimize capacitive

loads on the control outputs CON

OUT

. If long lines or capacitive

loads are present, it is best to connect the series resistor R

CON

as closely to the CON

OUT

pin as possible.

DYNAMIC LEVEL DETECTOR CHARACTERISTICS

Figures 3 and 4 show the dynamic performance of the level de-

tector to a change in signal level. The input to the detector (not

shown) is a series of 500ms tone bursts at 1kHz in successive

10dBV steps. The tone bursts start at a level of –60dBV (with R

IN

=10k) and return to –60dBV after each successive 10dB step.

Tone bursts range from –60dBV to +10dBV. Figure 3 shows the

logarithmic level detector output. The output of the detector is

3mV/dB at LOG AV and the amplifier gain is 40 which yields

120mV/dB. Thus, the output at CON

OUT

is seen to increase by

1.2V for each 10dBV increase in input level.

DYNAMIC ATTACK AND DECAY RATES

Figure 4 shows the output levels overlayed using a storage scope.

The attack rate is determined by the step size and the value of

FIGURE 3:

Detector Output

FIGURE 4:

Overlayed Detector Output

C

AV

. The attack time to final value is a function of the step size

increase. The chart of Figure 5 shows the values of total settling

times to within 5, 3, 2 and 1dB of final value with C

AV

= 10

µF.

When step sizes exceed 40dB, the increase in settling time for

larger steps is negligible. To calculate the attack time to final value

for any value of C

AV

, simply multiply the value in the chart by C

AV

/

10

µF.

The decay rates are linear ramps that are dependent on the cur-

rent out of the LOG AV pin (set by R

REF

) and the value of C

AV

.

The integration or decay time of the circuit is derived from the

formula:

5dB

3dB

2dB

1dB

10dB Step

11.28ms

21.46

30.19

46.09

20dB Step

16.65

26.83

35.56

51.46

30dB Step

18.15

28.33

37.06

52.96

40dB Step

18.61

27.79

37.52

53.42

50dB Step

(+144

µs)

60dB Step

(+46

µs)

FIGURE 5:

Settling Time (t

S

) for C

AV

= 10

µF, t

= t

S

(C

AV

/

10

µF)

Decrementation Rate (in dB/s) =

× 333

q

ln

OBSOLETE