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SSM2120 датащи(PDF) 4 Page - Analog Devices |
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SSM2120 датащи(HTML) 4 Page - Analog Devices |
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4 / 12 page ![]() 4 5/90, Rev. B1 SSM-2120/SSM-2122 DYNAMIC RANGE PROCESSOR/DUAL VCA a) GAIN (dB) VCA NOISE vs GAIN (20kHz BANDWIDTH) –20 –10 0 10 20 –70 –80 –90 b) FIGURE 1: Typical THD and Noise Performance VCA PERFORMANCE Figures 1a and 1b show the typical THD and noise performance of the VCAs over ±20dB gain/attenuation. Full Class A opera- tion provides very low THD. TRIMMING THE VCAs The control feedthrough (CFT) pins are optional control feedthrough null points. CFT nulling is usually required in appli- cations such as noise gating and downward expansion. If trim- ming is not used, leave the CFT pins open. Trim Procedure 1) Apply a 100Hz sine wave to the control point attenuator. The signal peaks should correspond to the control voltages which induce the VCAs maximum intended gain and at least 30dB of attenuation. 2) Adjust the 50k Ω potentiometer for the minimum feedthrough. (Trimmed control feedthrough is typically well under 1mV RMS when the maximum gain is unity using 36k Ω input and output resistors.) Applications such as compressor/limiters typically do not require control feedthrough trimming because the VCA operates at unity- gain unless the signal is large enough to initiate gain reduction. In this case the signal masks control feedthrough. This trim is ineffective for voltage-controlled filter applications. LEVEL DETECTION CIRCUITS The SSM-2120 contains two independent level detection circuits. Each circuit contains a wide dynamic range full-wave rectifier, logging circuit and a unipolar drive amplifier. These circuits will accurately detect the input signal level over a 100dB range from 30nA to 3mA peak-to-peak. LEVEL DETECTOR THEORY OF OPERATION Referring to the level detector block diagram of Figure 2, the RE- C IN input is an AC virtual ground. The next block implements the full-wave rectification of the input current. This current is then fed into a logging transistor (Q 1 ) whose pair transistor (Q 2 ) has a fixed collector current of I REF . The LOG AV output is then: FIGURE 2: Level Detector GAIN (dB) VCA THD PERFORMANCE vs GAIN (+10dBV IN/OUT @ 1kHz) –20 –10 0 10 20 .03 .01 .003 + – REC IN 2V + FULL WAVE RECTIFIER |IIN| V+ LOG AV + – THRESH CON OUT V– INPUT RIN CAV RREF 1k Ω 39k Ω TO VC 200 Ω V– Q1 Q2 IREF RCON OBSOLETE |
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