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ICS9150-08 датащи(PDF) 5 Page - Integrated Circuit Systems

номер детали ICS9150-08
подробное описание детали  Frequency Generator & Integrated Buffers for Pentium/Pro?
PDF  13 Pages
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производитель  ICST [Integrated Circuit Systems]
домашняя страница  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS9150-08 датащи(HTML) 5 Page - Integrated Circuit Systems

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5
ICS9150-08
Byte 1: CPU, Active/Inactive Register
(1= enable, 0 = disable)
BIT
PIN# PWD
DESCRIPTION
Bit 7
-
1
Reserved
Bit 6
-
1
Reserved
Bit 5
-
1
Reserved
Bit 4
-
1
Reserved
Bit 3
46
1
SDRAM16 (Act/Inact)
Bit 2
49
1
CPUCLK2 (Act/Inact)
Bit 1
51
1
CPUCLK1 (Act/Inact)
Bit 0
52
1
CPUCLK0 (Act/Inact)
Byte 2: PCI, Active/Inactive Register
(1= enable, 0 = disable)
BIT
PIN# PWD
DESCRIPTION
Bit 7
-
1
Reserved
Bit 6
8
1
PCICLKF (Act/Inact)
Bit 5
16
1
PCICLK5 (Act/Inact)
Bit 4
14
1
PCICLK4 (Act/Inact)
Bit 3
13
1
PCICLK3 (Act/Inact)
Bit 2
12
1
PCICLK2 (Act/Inact)
Bit 1
11
1
PCICLK1 (Act/Inact)
Bit 0
9
1
PCICLK0 (Act/Inact)
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
2. Latched Frequency Selects (FS#) will be inferted logic
load of the input frequency select pin conditions.
BIT
PIN#
PWD
DESCRIPTION
Bit 7
-
-
Latched FS0#
Bit 6
-
1
Reserved
Bit 5
-
1
Reserved
Bit 4
-
-
Latched FS1#
Bit 3
-
1
Reserved
Bit 2
-
1
Reserved
Bit 1
-
1
Reserved
Bit 0
-
1
Reserved
Byte 4: Reserved , Active/Inactive Register
(1= enable, 0 = disable)
BIT
PIN# PWD
DESCRIPTION
Bit 7
-
1
Reserved
Bit 6
-
-
Latched FS2#
Bit 5
54
1
IOAPIC1 (Act/Inact)
Bit 4
55
1
IOAPIC0 (Act/Inact)
Bit 3
-
1
Reserved
Bit 2
-
1
Reserved
Bit 1
2
1
REF1 (Act/Inact)
Bit 0
3
1
REF0 (Act/Inact)
Byte 5: Peripheral , Active/Inactive Register
(1= enable, 0 = disable)
Byte 3: SDRAM, Active/Inactive Register
(1= enable, 0 = disable)
BIT
PIN#
PWD
DESCRIPTION
Bit 7
-
1
Reserved
Bit 6
-
1
Reserved
Bit 5
30
1
48MHz (Act/Inact)
Bit 4
29
1
24MHz (Act/Inact)
Bit 3
33, 32,
25, 24
1
SDRAM(12:15) (Act/Inact)
Bit 2
22, 21,
19, 18
1
SDRAM (8:11) (Act/Inact)
Bit 1
39, 38,
36, 35
1
SDRAM (4:7) (Act/Inact)
Bit 0
44, 43,
41, 40
1
SDRAM0 (0:3) (Act/Inact)



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