ICS673-01

PLL Building Block

MDS 673-01 D

8

Revision 022500

Printed 11/15/00

Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126•(408)295-9800tel • www.icst.com

Avoiding PLL Lockup (continued)

power, very small (SOT-23), low cost, and has

high input impedance.

The trigger voltage of the comparator is set by

the voltage divider formed by R2 and R3. The

Figure 5. Using an External Comparator to Reset the VCO.

CHGP VCOIN

CAP

C2

C1

RZ

-

+

PD

VDD

R4

R2

R3

ICS673-01

voltage should be set to a value higher than the

VCO input is expected to run during normal

operation. Typically, this might be 0.5 V below

VDD. Hysteresis should be added to the circuit

by connecting resistor R4.