74LVC3G07

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Product data sheet

Rev. 11 — 9 April 2013

3 of 21

NXP Semiconductors

74LVC3G07

Triple buffer with open-drain output

5.

Functional diagram

6.

Pinning information

6.1 Pinning

Fig 1.

Logic symbol

Fig 2.

IEC logic symbol

Fig 3.

Logic diagram (one driver)

001aah762

3A

3Y

2A

2Y

1A

1Y

001aah763

3Y

3A

2Y

2A

1Y

1A

1

1

1

mna591

Y

A

GND

Fig 4.

Pin configuration SOT505-2 and SOT765-1

Fig 5.

Pin configuration SOT833-1, SOT1089,

SOT1116 and SOT1203

74LVC3G07

1A

3Y

1Y

2A

3A

GND

2Y

001aab022

1

2

3

4

6

5

8

7

74LVC3G07

3A

1Y

2Y

2A

3Y

1A

GND

001aac022

36

27

18

45

Transparent top view