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ICS1892 датащи(PDF) 132 Page - Integrated Circuit Systems |
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ICS1892 датащи(HTML) 132 Page - Integrated Circuit Systems |
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132 / 148 page ![]() ICS1892, Rev. D, 2/26/01 February 26, 2001 132 Chapter 10 DC and AC Operating Conditions ICS1892 Data Sheet © 2000-2001, Integrated Circuit Systems, Inc. All rights reserved. 10.5.9 10M Media Independent Interface: Receive Latency Table 10-16 lists the significant time periods for the 10M MII timing (which consists of timings of signals on the following pins: TP_RX (that is, the MII TP_RXP and TP_RXN pins), RXCLK, and RXD. Figure 10-9 shows the timing diagram for the time periods. Figure 10-9. 10M MII Receive Latency Timing Diagram Table 10-16. Time Period Parameter Conditions Min. Typ. Max. Units t1 First Bit of /5/ on TP_RX to /5/D/ on RXD 10M MII – 7.7 9 Bit times TP_RX* *Manchester encoding not shown. RXCLK RXD 5 5 D 5 t1 |
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