Table 23. Truth table

N°

Control pins

Control bits

Failure bits

Output pins

SPI DO

Comment

EN DIR PWM TS/ACT_OFF FW FW_PAS CP_LOW OV UV SC TSD WDTO GH1 GL1 GH2 GL2 GL_ER

1

0

X

X

X

X

X

X

X

X

X

X

X

RL

RL

RL

RL

T

Standby mode

2

1

X

X

X

X

X

X

X

X

X

X

X

RL

RL

RL

RL

1

Power-on reset

3

1

X

X

0

X

0

0

000

0

0

L

L

L

L

0

EXT_TS = 1 (external thermal

shutdown)

4

1

X

X

0

X

0

0

0

0

0

0

0

L

L

L

L

0

EXT_TS = 0 (active Off)

5

1

X

X

1

X

X

1

0

0

0

0

0

RL

RL

RL

RL

1

Charge pump voltage too low

6

1

X

X

1

X

X

0

0

0

0

1

0

RL

RL

RL

RL

1

Internal thermal shutdown

7

1

X

X

1

X

X

0

1

0

0

0

0

L

L

L

L

1

Overvoltage

8

1

X

X

1

X

X

0

0

1

0

0

0

L

L

L

L

1

Undervoltage

9

1

X

X

1

X

X

0

001

0

0

0

10

1

X

X

1

X

X

0

0

0

0

0

1

L

L

L

L

1

Watchdog time out

11

1

0

1

1

X

X

0

000

0

0

L

H

H

L

0

-

12

1

X

0

1

0

0

0

0

0

0

0

0

L

H

L

H

0

Act. free wheeling mode LS

13

1

0

0

1

0

1

0

0

0

0

0

0

L

H

L

L

0

Pass. free wheeling mode LS

14

1

1

0

1

0

1

0

0

0

0

0

0

L

L

L

H

0

Pass. free wheeling mode LS

15

1

1

1

1

X

X

0

000

0

0

H

L

L

H

0

-

16

1

X

0

1

1

0

0

0

0

0

0

0

H

L

H

L

0

Act. free wheeling mode HS

17

1

0

0

1

1

1

0

0

0

0

0

0

L

L

H

L

0

Pass. free wheeling mode HS

18

1

1

0

1

1

1

0

0

0

0

0

0

H

L

L

L

0

Pass. free wheeling mode HS

1.

Only the halfbridge (low-side and high-side) where one MOSFET is in short-circuit condition is switched-off. Both MOSFET’S of the other halfbridge remain active and

driven by DIR and PWM.