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AT91SAM датащи(PDF) 30 Page - ATMEL Corporation

номер детали AT91SAM
подробное описание детали  High-performance 32-bit RISC Architecture
PDF  50 Pages
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производитель  ATMEL [ATMEL Corporation]
домашняя страница  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT91SAM датащи(HTML) 30 Page - ATMEL Corporation

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30
SAM7S Series [DATASHEET]
6175KS–ATARM–25-Oct-12
Figure 9-4. Power Management Controller Block Diagram
9.4
Advanced Interrupt Controller
Controls the interrupt lines (nIRQ and nFIQ) of an ARM Processor
Individually maskable and vectored interrupt sources
Source 0 is reserved for the Fast Interrupt Input (FIQ)
Source 1 is reserved for system peripherals RTT, PIT, EFC, PMC, DBGU, etc.)
Other sources control the peripheral interrupts or external interrupts
Programmable edge-triggered or level-sensitive internal sources
Programmable positive/negative edge-triggered or high/low level-sensitive external sources
8-level Priority Controller
Drives the normal interrupt of the processor
Handles priority of the interrupt sources
Higher priority interrupts can be served during service of lower priority interrupt
Vectoring
Optimizes interrupt service routine branch and execution
One 32-bit vector register per interrupt source
Interrupt vector register reads the corresponding current interrupt vector
Protect Mode
Easy debugging by preventing automatic operations
Fast Forcing
Permits redirecting any interrupt source on the fast interrupt
General Interrupt Mask
Provides processor synchronization on events without triggering an interrupt
9.5
Debug Unit
Comprises:
One two-pin UART
One Interface for the Debug Communication Channel (DCC) support
MCK
periph_clk[2..14]
int
UDPCK
usb_suspend
SLCK
MAINCK
PLLCK
Prescaler
/1,/2,/4,...,/64
PCK
Processor
Clock
Controller
Idle Mode
Master Clock Controller
Peripherals
Clock Controller
ON/OFF
USB Clock Controller
ON/OFF
SLCK
MAINCK
PLLCK
Prescaler
/1,/2,/4,...,/64
Programmable Clock Controller
PLLCK
Divider
/1,/2,/4
pck[0..2]



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