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AT91SAM датащи(PDF) 29 Page - ATMEL Corporation |
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AT91SAM датащи(HTML) 29 Page - ATMEL Corporation |
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29 / 50 page ![]() 29 SAM7S Series [DATASHEET] 6175KS–ATARM–25-Oct-12 9.2 Clock Generator The Clock Generator embeds one low-power RC Oscillator, one Main Oscillator and one PLL with the following characteristics: RC Oscillator ranges between 22 kHz and 42 kHz Main Oscillator frequency ranges between 3 and 20 MHz Main Oscillator can be bypassed PLL output ranges between 80 and 220 MHz It provides SLCK, MAINCK and PLLCK. Figure 9-3. Clock Generator Block Diagram 9.3 Power Management Controller The Power Management Controller uses the Clock Generator outputs to provide: the Processor Clock PCK the Master Clock MCK the USB Clock UDPCK (not present on SAM7S32/16) all the peripheral clocks, independently controllable three programmable clock outputs The Master Clock (MCK) is programmable from a few hundred Hz to the maximum operating frequency of the device. The Processor Clock (PCK) switches off when entering processor idle mode, thus allowing reduced power consumption while waiting for an interrupt. Embedded RC Oscillator Main Oscillator PLL and Divider Clock Generator Power Management Controller XIN XOUT PLLRC Slow Clock SLCK Main Clock MAINCK PLL Clock PLLCK Control Status |
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