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STMPE1801BJR датащи(PDF) 53 Page - STMicroelectronics |
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STMPE1801BJR датащи(HTML) 53 Page - STMicroelectronics |
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53 / 60 page ![]() STMPE1801 Miscellaneous features Doc ID 17884 Rev 3 53/60 12 Miscellaneous features 12.1 Reset The STMPE1801 is equipped with an internal POR circuit that holds the device in reset state, until the clock is steady and VCC input is valid. The POR circuit is integrated with a filter with minimum 180 ns at 1.8 V VCC. The host system may choose to reset the STMPE1801 by asserting the RSTB pin. The reset pin is also integrated with a filter of minimum 200 µs duration and maximum 500 µs duration. |
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