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MB40C318VPFV датащи(PDF) 8 Page - fujitsu semiconductor |
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MB40C318VPFV датащи(HTML) 8 Page - fujitsu semiconductor |
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8 / 16 page ![]() 8 MB40C318V • Switching Characteristics (AVDD = DVDD = 3.00 V to 3.60 V, DVDDI = 4.75 V to 5.25 V, Ta = –20 °C to +70°C) s DIGITAL OUTPUT BUFFER LOAD CIRCUIT s MODE SETTING Parameter Symbol Value Unit Min. Typ. Max. Maximum conversion rate fS 140 — — MSPS Aperture time Timing diagram 1 to 3 tAD —3.5 — ns Timing diagram 4 — 2.0 — ns Digital output delay time Timing diagram 1 tpdS 4 8 11.5 ns tpdSO tWS+ + 4 tWS+ + 8 tWS+ + 11 ns Timing diagram 2 tpdM1 4 7 11.5 ns tpdM1O T + 4 T + 7 T + 11 ns Timing diagram 3 tpdM2 4 7 11.5 ns tpdM2O T + 4 T + 7 T + 11 ns Timing diagram 4 tpdD 3 6 10.5 ns tpdDO tWD+ + 2 tWD+ + 6 tWD+ + 10 ns CKSEL DSEL Mode Timing Diagram H H Differential CLK input-straight output mode Timing diagram 1 H L Differential CLK input-demultiplex output (in-phase) mode Timing diagram 2 L H Differential CLK input-demultiplex output (two-phase) mode Timing diagram 3 L L Two-phase CLK input mode (CLKA, CLKB) Timing diagram 4 DVSS Measurement point To the measurement point Note: CL includes a stray capacitance of a probe and a fixture. CL 18 pF |
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