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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TAS5729MD датащи(PDF) 7 Page - Texas Instruments |
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TAS5729MD датащи(HTML) 7 Page - Texas Instruments |
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7 / 59 page  TAS5729MD www.ti.com SLOS836A – MAY 2013 – REVISED JUNE 2013 SPEAKER AMPLIFIER IN ALL MODES over operating free-air temperature range (unless otherwise noted) Parameter Test Conditions Min Typ Max Unit 11.025/22.05/44.1-kHz data rate ±2% - 352.8 - kHz Speaker Amplifier Switching fSPK_AMP Frequency 48/24/12/8/16/32-kHz data rate ±2% - 384 - kHz PVDD = 15 V, TA = 25 °C, Die Only - 200 - m Ω On Resistance of Output Mosfet RDS(ON) PVDD= 15V, TA = 25 °C, Includes: Die, (both high-side and low-side) - 240 - m Ω Bond Wires, Leadframe Internal Pulldown Resistor at Connected when drivers are tri-stated to RPD Output of each Half-Bridge Making - 3 - k Ω provide bootstrap capacitor charge up the Full Bridge Outputs SPEAKER AMPLIFIER IN STEREO BRIDGE TIED LOAD (BTL) MODE TA = 25°C, PVDD = 18 V, AVDD = DRVDD = DVDD = 3.3 V, audio input signal = 1 kHz sine wave, BTL, AD mode, fS = 48 kHz, RSPK = 8 Ω, AES17 filter, fPWM = 384 kHz, external components per Typical Application Circuit diagrams, and in accordance with recommended operating conditions (unless otherwise specified). Parameter Test Conditions Min Typ Max Unit ICN(SPK) Idle Channel Noise PVDD = 18 V, A-Weighted - 56 - µVrms PVDD = 13 V, 10% THD, 1-kHz input - 10.5 - W signal Maximum Continuous Output PVDD = 8 V, 10% THD, 1-kHz input Po(SPK) - 4 - W Power Per. Ch. signal PVDD = 18 V, 10% THD, 1-kHz input - 12 - W signal Signal to Noise Ratio (Referenced PVDD = 18V, A-weighted, f = 1 kHz, SNR(SPK) - 105 - dB to 0dBFS Input Signal) maximum power at THD < 1% PVDD = 18 V; PO = 1 W - 0.15 - % Total Harmonic Distortion and THD+N(SPK) PVDD = 13 V; PO = 1 W - 0.13 - % Noise PVDD = 8 V; PO = 1 W - 0.2 - % PO = 1 W, f = 1 kHz (BD mode) - –70 - dB Cross-talk (worst case between X-Talk(SPK) LtoR and RtoL coupling) PO = 1 W, f = 1 kHz (AD mode) - –48 - dB SPEAKER AMPLIFIER IN STEREO POST-FILTER PARALLEL BRIDGE TIED LOAD (POST-FILTER PBTL) MODE TA = 25°C, PVDD = 18 V, AVDD = DRVDD = DVDD = 3.3 V, audio input signal = 1 kHz sine wave, BTL, AD mode, fS = 48 kHz, RSPK = 4 Ω, AES17 filter, fPWM = 384 kHz, external components per Typical Application Circuit diagrams, and in accordance with recommended operating conditions (unless otherwise specified). Parameter Test Conditions Min Typ Max Unit ICN(SPK) Idle Channel Noise PVDD = 18 V, A-Weighted - 42 - µVrms PVDD = 13 V, 10% THD, 1-kHz input - 18.9 - W signal Maximum Continuous Output PVDD = 8 V, 10% THD, 1-kHz input Po(SPK) - 7.2 - W Power Per. Ch. signal PVDD = 18 V, 10% THD, 1-kHz input - 24 - W signal Signal to Noise Ratio (Referenced PVDD = 18V, A-weighted, f = 1 kHz, SNR(SPK) - 105 - dB to 0dBFS Input Signal) maximum power at THD < 1% PVDD = 18 V; PO = 1 W - 0.06 - % Total Harmonic Distortion and THD+N(SPK) PVDD = 13 V; PO = 1 W - 0.03 - % Noise PVDD = 8 V; PO = 1 W - 0.15 - % Copyright © 2013, Texas Instruments Incorporated 7 Product Folder Links: TAS5729MD |
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