DS1602

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disturbing the last bit of data. All data transfers must consist of 8 bits when transferring protocol only or 8

+ 32 bits when reading or writing either counter. Data transfer is illustrated in Figure 3.

DATA INPUT

Following the 8–bit protocol that inputs write mode, 32 bits of data are written to the selected counter on

the rising edge of the next 32 CLK cycles. After 32 bits have been entered any additional CLK cycles will

transfer.

DATA OUTPUT

Following the eight CLK cycles that input read mode protocol, 32 bits of data will be output from the

selected counter on the next 32 CLK cycles. The first data bit to be transmitted from the selected 32–bit

counter occurs on the falling edge after the last bit of protocol is written. When transmitting data from

transfer. Data is driven out the DQ pin as long as CLK is low. When CLK is high the DQ pin is tristated.

CRYSTAL SELECTION

A standard 32.768 kHz quartz crystal can be directly connected to the DS1602 via pins 1 and 2 (X1, X2).

on crystal selection and crystal layout considerations, please consult Application Note 58, “Crystal

Considerations with Dallas Real Time Clocks.”

BATTERY SELECTION

The battery selected for use with the DS1602 should have an output voltage between 2.5 and 3.5 volts. A

lithium battery of 35 mAh or greater will run the elapsed time counter for over 10 years in the absence of

power. Small lithium coin cell batteries produce both the proper output voltage and have the capacity to

supply the DS1602 for the useable lifetime of the equipment where they are installed.

DS1602 ELAPSED TIME COUNTER BLOCK DIAGRAM Figure 1