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CPC7583BA датащи(PDF) 12 Page - Clare, Inc. |
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CPC7583BA датащи(HTML) 12 Page - Clare, Inc. |
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12 / 16 page ![]() www.clare.com 12 Rev. E CPC7583 (TSD) as a control are 0 which forces the device to the “all off state” or float which allow logic inputs to remain active. This may require use of an open collector buffer. Ring Access Switch Zero Cross Current Turn Off After the application of a logic input to turn SW4 off, the ring access switch is designed to delay the change in state until the next zero crossing. Once on, the switch requires a zero current cross to turn off and therefore should not be used to switch a pure DC signal. The switch will remain in the on state no matter what logic input until the next zero crossing. These switching characteristics will reduce and possibly eliminate overall system impulse noise normally associated with ringing access switches. The attributes of ringing access switch may make it possible to eliminate the need for a zero cross switching scheme. A minimum impedance of 300 Ω in series with the ring generator is recommended. Power Supplies Both a +5V supply and battery voltage are connected to the CPC7583. CPC7583 switch state control is powered exclusively by the +5V supply. As a result, the CPC7583 exhibits extremely low power dissipation during both active and idle states. Battery Voltage Monitor The CPC7583 also uses the voltage reference to monitor battery voltage. If battery voltage is lost, the CPC7583 will immediately enter the “all off” state and remain in this state until the battery voltage is restored. The device will also enter the “all off” state if the battery voltage rises above – 10V and will remain there until the battery voltage drops below –15V. This battery monitor feature draws a small current from the battery (<1 µA) and will add slightly to the device’s overall power dissipation. Protection Diode Bridge/SCR The CPC7583 uses a combination of current limited break switches, a diode bridge/SCR clamping circuit and a ther- mal shutdown mechanism to protect the SLIC device or other associated circuitry from damage during line tran- sient events such as lightning. During a positive transient condition, the fault current is conducted through the diode bridge and to ground. During a negative transient of two or four volts more negative than the battery, the SCR con- ducts and faults are shunted to ground via the SCR and diode bridge. Also, in order for the SCR to crowbar or foldback, the on voltage (see Table 11) of the SCR must be less negative than the battery reference voltage. If the battery voltage is less negative the SCR on voltage, the SCR will not crow- bar, however it will conduct fault currents to ground. For power induction or power cross fault conditions, the positive cycle of the transient is clamped to the diode drop above ground and the fault current directed to ground. The negative cycle of the transient will cause the SCR to con- duct when the voltage exceeds the battery reference volt- age by two to four volts, steering the current to ground. Current Limiting function If a lightning strike transient occurs when the device in the talk/idle state, the current is passed along the line to the integrated protection circuitry and limited by the dynamic current limit response of break switches SW1 and SW2. When a 1000V 10x1000 pulse (LSSGR lightning) is ap- plied to the line though a properly clamped external pro- tector, the current seen at pins 6 (TBAT) and pin 23 (RBAT) will be a pulse with a typical magnitude and duration of 2.5A and < 0.5ms. If a power cross fault occurs with device in the talk/idle state, the current is passed though the break switches SW1 and SW2 on to the integrated protection circuit and is lim- ited by the dynamic DC current limit response of the two break switches. The DC current limit, specified over tem- perature, is between 80mA and 400mA and the circuitry has a negative temperature coefficient. As a result, if the device is subjected to extended heating due to power cross fault, the measured current at pin 6 (TBAT) and pin 23 (RBAT) will decrease as the device temperature increases. If the device temperature rises sufficiently, the temperature shut- down mechanism will activate and the device will default to the “all off” state. Temperature Shutdown The thermal shutdown mechanism will activate when the device temperature reaches a minimum of 110 ϒC placing the device in the “all off” state regardless of logic input. During this thermal shutdown mode, pin 13 (TSD) will read 0V. Normal output of TSD is +V DD . If presented with a short duration transient such as a light- ning event, the thermal shutdown feature will not typically activate. But in an extended power cross transient, the device temperature will rise and the thermal shutdown will activate forcing the switches to an “all off” state. At this point the current measured at pin 6 (TBAT) and pin 23 (RBAT) will drop to zero. Once the device enters thermal shut- down it will remain in the “all off” state until the temperature of the device drops below the activation level of the ther- mal shutdown circuit. This will return the device to the state prior to thermal shutdown. If the transient has not passed, current will flow at the value allowed by the dynamic DC current limiting of the switches and heating will begin again, reactivating the thermal shutdown mechanism. This cycle |
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